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authorDmitry Osipenko <digetx@gmail.com>2018-06-04 01:48:05 +0300
committerStephen Boyd <sboyd@kernel.org>2018-07-08 17:08:31 -0700
commitda0d2239a56ec8fe6a617aade5901ab3bffc1ef4 (patch)
tree60ad18308a4f827ef322371a20571376f5dfcb5f /drivers/clk/tegra
parentce397d215ccd07b8ae3f71db689aedb85d56ab40 (diff)
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clk: tegra: Mark Memory Controller clock as critical
Memory Controller should be always-on. Currently the sibling EMC clock is marked as critical, let's mark MC clock too for consistency. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/tegra')
-rw-r--r--drivers/clk/tegra/clk-divider.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 16e0aee14773..58874c1bbf5e 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -194,6 +194,7 @@ static const struct clk_div_table mc_div_table[] = {
struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,
void __iomem *reg, spinlock_t *lock)
{
- return clk_register_divider_table(NULL, name, parent_name, 0, reg,
- 16, 1, 0, mc_div_table, lock);
+ return clk_register_divider_table(NULL, name, parent_name,
+ CLK_IS_CRITICAL, reg, 16, 1, 0,
+ mc_div_table, lock);
}