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authorOlof Johansson <olof@lixom.net>2012-09-20 21:16:43 -0700
committerOlof Johansson <olof@lixom.net>2012-09-20 21:16:43 -0700
commitea832c41dacbc4a5f3888d9ef7c38213914aba2a (patch)
treebee97817d9a55f000e2bec5fa5d62d325050e6a6 /drivers/clk/versatile/clk-realview.c
parentb74aae9a2074e1caa2e40bf119f3a633f77c94e4 (diff)
parent84bae6c379e362aa017efd417199f51d5c2273ac (diff)
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Merge branch 'next/dt' into next/multiplatform
* next/dt: (182 commits) ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: dt: tegra: whistler: configure power off ARM: mxs: m28evk: Disable OCOTP OUI loading ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent ARM: dts: imx6q-sabrelite: add usbotg pinctrl support ARM: dts: imx23-olinuxino: Add USB host support ARM: dts: imx6q-sabrelite: add usbmisc device ARM: dts: mx23: Add USB resources ARM: dts: mxs: Add ethernetX to macX aliases ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ...
Diffstat (limited to 'drivers/clk/versatile/clk-realview.c')
-rw-r--r--drivers/clk/versatile/clk-realview.c114
1 files changed, 114 insertions, 0 deletions
diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c
new file mode 100644
index 000000000000..e21a99cef378
--- /dev/null
+++ b/drivers/clk/versatile/clk-realview.c
@@ -0,0 +1,114 @@
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/clk-provider.h>
+
+#include <mach/hardware.h>
+#include <mach/platform.h>
+
+#include "clk-icst.h"
+
+/*
+ * Implementation of the ARM RealView clock trees.
+ */
+
+static void __iomem *sys_lock;
+static void __iomem *sys_vcoreg;
+
+/**
+ * realview_oscvco_get() - get ICST OSC settings for the RealView
+ */
+static struct icst_vco realview_oscvco_get(void)
+{
+ u32 val;
+ struct icst_vco vco;
+
+ val = readl(sys_vcoreg);
+ vco.v = val & 0x1ff;
+ vco.r = (val >> 9) & 0x7f;
+ vco.s = (val >> 16) & 03;
+ return vco;
+}
+
+static void realview_oscvco_set(struct icst_vco vco)
+{
+ u32 val;
+
+ val = readl(sys_vcoreg) & ~0x7ffff;
+ val |= vco.v | (vco.r << 9) | (vco.s << 16);
+
+ /* This magic unlocks the CM VCO so it can be controlled */
+ writel(0xa05f, sys_lock);
+ writel(val, sys_vcoreg);
+ /* This locks the CM again */
+ writel(0, sys_lock);
+}
+
+static const struct icst_params realview_oscvco_params = {
+ .ref = 24000000,
+ .vco_max = ICST307_VCO_MAX,
+ .vco_min = ICST307_VCO_MIN,
+ .vd_min = 4 + 8,
+ .vd_max = 511 + 8,
+ .rd_min = 1 + 2,
+ .rd_max = 127 + 2,
+ .s2div = icst307_s2div,
+ .idx2s = icst307_idx2s,
+};
+
+static const struct clk_icst_desc __initdata realview_icst_desc = {
+ .params = &realview_oscvco_params,
+ .getvco = realview_oscvco_get,
+ .setvco = realview_oscvco_set,
+};
+
+/*
+ * realview_clk_init() - set up the RealView clock tree
+ */
+void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
+{
+ struct clk *clk;
+
+ sys_lock = sysbase + REALVIEW_SYS_LOCK_OFFSET;
+ if (is_pb1176)
+ sys_vcoreg = sysbase + REALVIEW_SYS_OSC0_OFFSET;
+ else
+ sys_vcoreg = sysbase + REALVIEW_SYS_OSC4_OFFSET;
+
+
+ /* APB clock dummy */
+ clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
+ clk_register_clkdev(clk, "apb_pclk", NULL);
+
+ /* 24 MHz clock */
+ clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
+ 24000000);
+ clk_register_clkdev(clk, NULL, "dev:uart0");
+ clk_register_clkdev(clk, NULL, "dev:uart1");
+ clk_register_clkdev(clk, NULL, "dev:uart2");
+ clk_register_clkdev(clk, NULL, "fpga:kmi0");
+ clk_register_clkdev(clk, NULL, "fpga:kmi1");
+ clk_register_clkdev(clk, NULL, "fpga:mmc0");
+ clk_register_clkdev(clk, NULL, "dev:ssp0");
+ if (is_pb1176) {
+ /*
+ * UART3 is on the dev chip in PB1176
+ * UART4 only exists in PB1176
+ */
+ clk_register_clkdev(clk, NULL, "dev:uart3");
+ clk_register_clkdev(clk, NULL, "dev:uart4");
+ } else
+ clk_register_clkdev(clk, NULL, "fpga:uart3");
+
+
+ /* 1 MHz clock */
+ clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
+ 1000000);
+ clk_register_clkdev(clk, NULL, "sp804");
+
+ /* ICST VCO clock */
+ clk = icst_clk_register(NULL, &realview_icst_desc);
+ clk_register_clkdev(clk, NULL, "dev:clcd");
+ clk_register_clkdev(clk, NULL, "issp:clcd");
+}