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authorMike Turquette <mturquette@linaro.org>2012-05-02 16:23:43 -0700
committerMike Turquette <mturquette@linaro.org>2012-05-08 14:11:53 -0700
commit63f5c3b2b18dcaca0fc8983b52a3f5d4d70a0590 (patch)
tree966cda40bacfc4be9dfc7c3b13427d7661665c2e /drivers/clk
parent7704addb60e274d4e98c69a02f7ebe3f77c6c3a4 (diff)
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clk: prevent spurious parent rate propagation
Patch 'clk: always pass parent_rate into .round_rate' made a subtle change to the semantics of .round_rate. It is now expected for the parent's rate to always be passed in, simplifying the implemenation of various .round_rate callback definitions. However the patch also introduced a bug in clk_calc_new_rates whereby a clock without the CLK_SET_RATE_PARENT flag set could still propagate a rate change up to a parent clock if the the .round_rate callback modified the &best_parent_rate value in any way. This patch fixes the issue at the framework level (in clk_calc_new_rates) by specifically handling the case where the CLK_SET_RATE_PARENT flag is not set. Signed-off-by: Mike Turquette <mturquette@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 8149764f8438..7ceca0e8645a 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -774,12 +774,18 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)
if (IS_ERR_OR_NULL(clk))
return NULL;
+ /* save parent rate, if it exists */
+ if (clk->parent)
+ best_parent_rate = clk->parent->rate;
+
/* never propagate up to the parent */
if (!(clk->flags & CLK_SET_RATE_PARENT)) {
if (!clk->ops->round_rate) {
clk->new_rate = clk->rate;
return NULL;
}
+ new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate);
+ goto out;
}
/* need clk->parent from here on out */
@@ -795,7 +801,6 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)
goto out;
}
- best_parent_rate = clk->parent->rate;
new_rate = clk->ops->round_rate(clk->hw, rate, &best_parent_rate);
if (best_parent_rate != clk->parent->rate) {