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authorStephen Boyd <sboyd@codeaurora.org>2016-03-01 11:00:09 -0800
committerStephen Boyd <sboyd@codeaurora.org>2016-03-02 17:48:26 -0800
commit0b4d613a71decf62fc15aad03a5f0d740b80713e (patch)
treebbde767d1bd82c4d04fbf398441f66ea12861ce1 /drivers/clk
parent66f4ae777d0c2c29e4a937c3c88ddd24b67c4a9a (diff)
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clk: zynq: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag. Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/zynq/clkc.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 38a65c3e62fc..88a2cab37f62 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -265,8 +265,7 @@ static void __init zynq_clk_setup(struct device_node *np)
pr_warn("ps_clk frequency not specified, using 33 MHz.\n");
tmp = 33333333;
}
- ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, CLK_IS_ROOT,
- tmp);
+ ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, 0, tmp);
/* PLLs */
clk = clk_register_zynq_pll("armpll_int", "ps_clk", SLCR_ARMPLL_CTRL,