diff options
author | Olof Johansson <olof@lixom.net> | 2014-05-21 22:32:57 -0700 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2014-05-21 22:32:57 -0700 |
commit | efca0a3e85045da839320d7c5121f82d55be8b79 (patch) | |
tree | ac3a55fc94cea3c3bc518f6ea4c819ab9c742104 /drivers/clocksource/exynos_mct.c | |
parent | ed99885ccb89471f52d34b74b15fc9059bf07504 (diff) | |
parent | 93bfb769752babdc4d3665a1fb166bb4e3ff927b (diff) | |
download | linux-efca0a3e85045da839320d7c5121f82d55be8b79.tar.gz linux-efca0a3e85045da839320d7c5121f82d55be8b79.tar.bz2 linux-efca0a3e85045da839320d7c5121f82d55be8b79.zip |
Merge tag 'samsung-drivers' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung driver update for 3.16" from Kukjin Kim:
exynos_mct update for v3.16
- register sched_clock callback to use clocksource mct-frc
* tag 'samsung-drivers' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clocksource: exynos_mct: register sched_clock callback
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/clocksource/exynos_mct.c')
-rw-r--r-- | drivers/clocksource/exynos_mct.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index acf5a329d538..8d6420013a04 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -24,6 +24,7 @@ #include <linux/of_irq.h> #include <linux/of_address.h> #include <linux/clocksource.h> +#include <linux/sched_clock.h> #define EXYNOS4_MCTREG(x) (x) #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) @@ -192,12 +193,19 @@ struct clocksource mct_frc = { .resume = exynos4_frc_resume, }; +static u64 notrace exynos4_read_sched_clock(void) +{ + return exynos4_frc_read(&mct_frc); +} + static void __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(0, 0); if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name); + + sched_clock_register(exynos4_read_sched_clock, 64, clk_rate); } static void exynos4_mct_comp0_stop(void) |