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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2021-12-30 16:02:45 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-12-30 17:44:06 +0100 |
| commit | 53ada0955270007bbc84c64b3646ac7c70f96442 (patch) | |
| tree | 1c20a911efdaba2b8f3fd59e5df5c43355f4aab7 /drivers/counter | |
| parent | a49ede8208117f48d3a9bc3b514c68d45019ee44 (diff) | |
| download | linux-53ada0955270007bbc84c64b3646ac7c70f96442.tar.gz linux-53ada0955270007bbc84c64b3646ac7c70f96442.tar.bz2 linux-53ada0955270007bbc84c64b3646ac7c70f96442.zip | |
counter: intel-qep: Convert to counter_priv() wrapper
This is a straight forward conversion to the new counter_priv() wrapper.
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20211230150300.72196-9-u.kleine-koenig@pengutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/counter')
| -rw-r--r-- | drivers/counter/intel-qep.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c index 0924d16de6e2..8f84a48508ac 100644 --- a/drivers/counter/intel-qep.c +++ b/drivers/counter/intel-qep.c @@ -109,7 +109,7 @@ static void intel_qep_init(struct intel_qep *qep) static int intel_qep_count_read(struct counter_device *counter, struct counter_count *count, u64 *val) { - struct intel_qep *const qep = counter->priv; + struct intel_qep *const qep = counter_priv(counter); pm_runtime_get_sync(qep->dev); *val = intel_qep_readl(qep, INTEL_QEPCOUNT); @@ -176,7 +176,7 @@ static struct counter_synapse intel_qep_count_synapses[] = { static int intel_qep_ceiling_read(struct counter_device *counter, struct counter_count *count, u64 *ceiling) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); pm_runtime_get_sync(qep->dev); *ceiling = intel_qep_readl(qep, INTEL_QEPMAX); @@ -188,7 +188,7 @@ static int intel_qep_ceiling_read(struct counter_device *counter, static int intel_qep_ceiling_write(struct counter_device *counter, struct counter_count *count, u64 max) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); int ret = 0; /* Intel QEP ceiling configuration only supports 32-bit values */ @@ -213,7 +213,7 @@ out: static int intel_qep_enable_read(struct counter_device *counter, struct counter_count *count, u8 *enable) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); *enable = qep->enabled; @@ -223,7 +223,7 @@ static int intel_qep_enable_read(struct counter_device *counter, static int intel_qep_enable_write(struct counter_device *counter, struct counter_count *count, u8 val) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); u32 reg; bool changed; @@ -256,7 +256,7 @@ static int intel_qep_spike_filter_ns_read(struct counter_device *counter, struct counter_count *count, u64 *length) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); u32 reg; pm_runtime_get_sync(qep->dev); @@ -277,7 +277,7 @@ static int intel_qep_spike_filter_ns_write(struct counter_device *counter, struct counter_count *count, u64 length) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); u32 reg; bool enable; int ret = 0; @@ -326,7 +326,7 @@ static int intel_qep_preset_enable_read(struct counter_device *counter, struct counter_count *count, u8 *preset_enable) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); u32 reg; pm_runtime_get_sync(qep->dev); @@ -341,7 +341,7 @@ static int intel_qep_preset_enable_read(struct counter_device *counter, static int intel_qep_preset_enable_write(struct counter_device *counter, struct counter_count *count, u8 val) { - struct intel_qep *qep = counter->priv; + struct intel_qep *qep = counter_priv(counter); u32 reg; int ret = 0; |