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authorStratos Karafotis <stratosk@semaphore.gr>2014-07-18 08:37:24 -0700
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2014-07-21 13:43:18 +0200
commit4ab60c3f32c721e46217e762bcd3e55a8f659c04 (patch)
tree5edf608225d61bc595e99fe76c5521501dda1624 /drivers/cpufreq/intel_pstate.c
parentc410833a3c96b325c68987c2544becad39079c33 (diff)
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cpufreq: intel_pstate: Disable interrupts during MSRs reading
According to Intel 64 and IA-32 Architectures SDM, Volume 3, Chapter 14.2, "Software needs to exercise care to avoid delays between the two RDMSRs (for example interrupts)". So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF. This should increase the accuracy of the calculations. Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr> Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq/intel_pstate.c')
-rw-r--r--drivers/cpufreq/intel_pstate.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 9d75bd6faf65..ff3c5624972c 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -577,9 +577,12 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu)
static inline void intel_pstate_sample(struct cpudata *cpu)
{
u64 aperf, mperf;
+ unsigned long flags;
+ local_irq_save(flags);
rdmsrl(MSR_IA32_APERF, aperf);
rdmsrl(MSR_IA32_MPERF, mperf);
+ local_irq_restore(flags);
aperf = aperf >> FRAC_BITS;
mperf = mperf >> FRAC_BITS;