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author | Paul Burton <paul.burton@imgtec.com> | 2014-04-14 16:25:29 +0100 |
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committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-28 16:20:36 +0100 |
commit | d050894435cdc78807e714a0148527542a583e87 (patch) | |
tree | 39f95ee57dbe42e78945365e2b166161a24cc804 /drivers/cpuidle/Kconfig.mips | |
parent | f08dbf8a61462aa122b9b5077849a3f4bd84702a (diff) | |
download | linux-d050894435cdc78807e714a0148527542a583e87.tar.gz linux-d050894435cdc78807e714a0148527542a583e87.tar.bz2 linux-d050894435cdc78807e714a0148527542a583e87.zip |
cpuidle: cpuidle-cps: add MIPS CPS cpuidle driver
This patch adds a cpuidle driver for systems based around the MIPS
Coherent Processing System (CPS) architecture. It supports four idle
states:
- The standard MIPS wait instruction.
- The non-coherent wait, clock gated & power gated states exposed by
the recently added pm-cps layer.
The pm-cps layer is used to enter all the deep idle states. Since cores
in the clock or power gated states cannot service interrupts, the
gic_send_ipi_single function is modified to send a power up command for
the appropriate core to the CPC in cases where the target CPU has marked
itself potentially incoherent.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'drivers/cpuidle/Kconfig.mips')
-rw-r--r-- | drivers/cpuidle/Kconfig.mips | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/cpuidle/Kconfig.mips b/drivers/cpuidle/Kconfig.mips new file mode 100644 index 000000000000..0e70ee28a5ca --- /dev/null +++ b/drivers/cpuidle/Kconfig.mips @@ -0,0 +1,17 @@ +# +# MIPS CPU Idle Drivers +# +config MIPS_CPS_CPUIDLE + bool "CPU Idle driver for MIPS CPS platforms" + depends on CPU_IDLE + depends on SYS_SUPPORTS_MIPS_CPS + select ARCH_NEEDS_CPU_IDLE_COUPLED if MIPS_MT + select GENERIC_CLOCKEVENTS_BROADCAST if SMP + select MIPS_CPS_PM + default y + help + Select this option to enable processor idle state management + through cpuidle for systems built around the MIPS Coherent + Processing System (CPS) architecture. In order to make use of + the deepest idle states you will need to ensure that you are + also using the CONFIG_MIPS_CPS SMP implementation. |