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| author | Gilad Ben-Yossef <gilad@benyossef.com> | 2018-02-19 14:51:23 +0000 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2018-03-03 00:03:16 +0800 |
| commit | 27b3b22dd98caef023cbaa4871b356e4596a81af (patch) | |
| tree | caeedee7405b5b9e1a885bf2b607aedee64c2534 /drivers/crypto/ccree/cc_cipher.c | |
| parent | 9d3a45ea209fd1daf3bb9e66a07caf59bf7da9fc (diff) | |
| download | linux-27b3b22dd98caef023cbaa4871b356e4596a81af.tar.gz linux-27b3b22dd98caef023cbaa4871b356e4596a81af.tar.bz2 linux-27b3b22dd98caef023cbaa4871b356e4596a81af.zip | |
crypto: ccree - add support for older HW revs
Add support for the legacy CryptoCell 630 and 710 revs.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccree/cc_cipher.c')
| -rw-r--r-- | drivers/crypto/ccree/cc_cipher.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/crypto/ccree/cc_cipher.c b/drivers/crypto/ccree/cc_cipher.c index 1aa7c56dbc02..df98f7afe645 100644 --- a/drivers/crypto/ccree/cc_cipher.c +++ b/drivers/crypto/ccree/cc_cipher.c @@ -502,7 +502,7 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, set_dout_dlli(&desc[*seq_size], sg_dma_address(dst), nbytes, NS_BIT, (!areq ? 0 : 1)); if (areq) - set_queue_last_ind(&desc[*seq_size]); + set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]); set_flow_mode(&desc[*seq_size], flow_mode); (*seq_size)++; @@ -547,7 +547,7 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, (!areq ? 0 : 1)); } if (areq) - set_queue_last_ind(&desc[*seq_size]); + set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]); set_flow_mode(&desc[*seq_size], flow_mode); (*seq_size)++; @@ -748,6 +748,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_XTS, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "xts512(aes)", @@ -764,6 +765,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_XTS, .flow_mode = S_DIN_to_AES, .data_unit = 512, + .min_hw_rev = CC_HW_REV_712, }, { .name = "xts4096(aes)", @@ -780,6 +782,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_XTS, .flow_mode = S_DIN_to_AES, .data_unit = 4096, + .min_hw_rev = CC_HW_REV_712, }, { .name = "essiv(aes)", @@ -795,6 +798,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_ESSIV, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_712, }, { .name = "essiv512(aes)", @@ -811,6 +815,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_ESSIV, .flow_mode = S_DIN_to_AES, .data_unit = 512, + .min_hw_rev = CC_HW_REV_712, }, { .name = "essiv4096(aes)", @@ -827,6 +832,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_ESSIV, .flow_mode = S_DIN_to_AES, .data_unit = 4096, + .min_hw_rev = CC_HW_REV_712, }, { .name = "bitlocker(aes)", @@ -842,6 +848,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_BITLOCKER, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_712, }, { .name = "bitlocker512(aes)", @@ -858,6 +865,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_BITLOCKER, .flow_mode = S_DIN_to_AES, .data_unit = 512, + .min_hw_rev = CC_HW_REV_712, }, { .name = "bitlocker4096(aes)", @@ -874,6 +882,7 @@ static const struct cc_alg_template skcipher_algs[] = { .cipher_mode = DRV_CIPHER_BITLOCKER, .flow_mode = S_DIN_to_AES, .data_unit = 4096, + .min_hw_rev = CC_HW_REV_712, }, { .name = "ecb(aes)", @@ -890,6 +899,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_ECB, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "cbc(aes)", @@ -906,6 +916,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_CBC, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "ofb(aes)", @@ -922,6 +933,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_OFB, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "cts1(cbc(aes))", @@ -938,6 +950,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_CBC_CTS, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "ctr(aes)", @@ -954,6 +967,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_CTR, .flow_mode = S_DIN_to_AES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "cbc(des3_ede)", @@ -970,6 +984,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_CBC, .flow_mode = S_DIN_to_DES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "ecb(des3_ede)", @@ -986,6 +1001,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_ECB, .flow_mode = S_DIN_to_DES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "cbc(des)", @@ -1002,6 +1018,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_CBC, .flow_mode = S_DIN_to_DES, + .min_hw_rev = CC_HW_REV_630, }, { .name = "ecb(des)", @@ -1018,6 +1035,7 @@ static const struct cc_alg_template skcipher_algs[] = { }, .cipher_mode = DRV_CIPHER_ECB, .flow_mode = S_DIN_to_DES, + .min_hw_rev = CC_HW_REV_630, }, }; @@ -1094,6 +1112,9 @@ int cc_cipher_alloc(struct cc_drvdata *drvdata) dev_dbg(dev, "Number of algorithms = %zu\n", ARRAY_SIZE(skcipher_algs)); for (alg = 0; alg < ARRAY_SIZE(skcipher_algs); alg++) { + if (skcipher_algs[alg].min_hw_rev > drvdata->hw_rev) + continue; + dev_dbg(dev, "creating %s\n", skcipher_algs[alg].driver_name); t_alg = cc_create_alg(&skcipher_algs[alg], dev); if (IS_ERR(t_alg)) { |