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author | Lothar Waßmann <LW@KARO-electronics.de> | 2011-12-08 09:15:44 +0100 |
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committer | Vinod Koul <vinod.koul@linux.intel.com> | 2011-12-23 20:54:55 +0530 |
commit | 7ad7a345a4f17c08a1bb9bfdbb62f7793d84aa36 (patch) | |
tree | 83839c0af2da4529d5fdec1b9c961b541d572c66 /drivers/dma/dmaengine.c | |
parent | 6d23ea4b1906f28f5d99ad6aeef7207c48be6bfd (diff) | |
download | linux-7ad7a345a4f17c08a1bb9bfdbb62f7793d84aa36.tar.gz linux-7ad7a345a4f17c08a1bb9bfdbb62f7793d84aa36.tar.bz2 linux-7ad7a345a4f17c08a1bb9bfdbb62f7793d84aa36.zip |
dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels
This is how the original Freescale code (unintentionally) worked,
because the code path which would have asserted the CLKGATE bit was
never actually reached in their code.
This fixes the nefarious "DMA timout" bug when multiple DMA channels
(e.g. GPMI NAND and MMC) are used at the same time.
If a better fix for this problem should be found, the clkgate handling
could be reinstated.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html
Also reverse the order of mxs_dma_disable_chan() and
mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan()
can only work when the DMA channel is enabled.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/dmaengine.c')
0 files changed, 0 insertions, 0 deletions