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authorYanchang Li <yl22@csr.com>2015-07-27 05:50:21 +0000
committerVinod Koul <vinod.koul@intel.com>2015-08-18 22:13:59 +0530
commitac9bd0ef5d3eefe9a21a7df6819937e3aa265203 (patch)
tree261e88c267b04b430f904babda03e9e79e533288 /drivers/dma/sirf-dma.c
parentdf48f3ff95c432cc3469e0df67da76ffcf2237af (diff)
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dmaengine: sirf: clear pending DMA interrupt when DMA terminates
If DMA interrupt comes and is latched by IRQ controller during the execution of dma_terminate_all(), dma_irq routine will be executed after dma terminated, and it will cause kernel panic. We clear DMA interrupts in dma_terminate_all() to avoid this useless interrupt. Signed-off-by: Yanchang Li <Yanchang.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/sirf-dma.c')
-rw-r--r--drivers/dma/sirf-dma.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/dma/sirf-dma.c b/drivers/dma/sirf-dma.c
index 8c5186cc9f63..7d5598d874e1 100644
--- a/drivers/dma/sirf-dma.c
+++ b/drivers/dma/sirf-dma.c
@@ -455,6 +455,7 @@ static int sirfsoc_dma_terminate_all(struct dma_chan *chan)
switch (sdma->type) {
case SIRFSOC_DMA_VER_A7V1:
writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_INT_EN_CLR);
+ writel_relaxed(1 << cid, sdma->base + SIRFSOC_DMA_CH_INT);
writel_relaxed((1 << cid) | 1 << (cid + 16),
sdma->base +
SIRFSOC_DMA_CH_LOOP_CTRL_CLR_ATLAS7);
@@ -462,6 +463,8 @@ static int sirfsoc_dma_terminate_all(struct dma_chan *chan)
break;
case SIRFSOC_DMA_VER_A7V2:
writel_relaxed(0, sdma->base + SIRFSOC_DMA_INT_EN_ATLAS7);
+ writel_relaxed(SIRFSOC_DMA_INT_ALL_ATLAS7,
+ sdma->base + SIRFSOC_DMA_INT_ATLAS7);
writel_relaxed(0, sdma->base + SIRFSOC_DMA_LOOP_CTRL_ATLAS7);
writel_relaxed(0, sdma->base + SIRFSOC_DMA_VALID_ATLAS7);
break;