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author | yanyang1 <young.yang@amd.com> | 2015-05-22 14:39:35 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-06-03 21:03:51 -0400 |
commit | 5fc3aeeb9e553a20ce62544f7176c6c4aca52d71 (patch) | |
tree | 3b05b96a184970166b8e9c61465b47734e65141c /drivers/gpu/drm/amd/amdgpu/tonga_ih.c | |
parent | dcc357e63727b63995dd869f015a748c9235eb42 (diff) | |
download | linux-5fc3aeeb9e553a20ce62544f7176c6c4aca52d71.tar.gz linux-5fc3aeeb9e553a20ce62544f7176c6c4aca52d71.tar.bz2 linux-5fc3aeeb9e553a20ce62544f7176c6c4aca52d71.zip |
drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
The structure is renamed and moved to amd_shared.h to make
the component independent. This makes it easier to add
new components in the future.
v2: fix include path
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/tonga_ih.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 51 |
1 files changed, 33 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index cff1b8bce6a4..743c372837aa 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -270,15 +270,18 @@ static void tonga_ih_set_rptr(struct amdgpu_device *adev) } } -static int tonga_ih_early_init(struct amdgpu_device *adev) +static int tonga_ih_early_init(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + tonga_ih_set_interrupt_funcs(adev); return 0; } -static int tonga_ih_sw_init(struct amdgpu_device *adev) +static int tonga_ih_sw_init(void *handle) { int r; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; r = amdgpu_ih_ring_init(adev, 4 * 1024, true); if (r) @@ -292,17 +295,20 @@ static int tonga_ih_sw_init(struct amdgpu_device *adev) return r; } -static int tonga_ih_sw_fini(struct amdgpu_device *adev) +static int tonga_ih_sw_fini(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + amdgpu_irq_fini(adev); amdgpu_ih_ring_fini(adev); return 0; } -static int tonga_ih_hw_init(struct amdgpu_device *adev) +static int tonga_ih_hw_init(void *handle) { int r; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; r = tonga_ih_irq_init(adev); if (r) @@ -311,25 +317,32 @@ static int tonga_ih_hw_init(struct amdgpu_device *adev) return 0; } -static int tonga_ih_hw_fini(struct amdgpu_device *adev) +static int tonga_ih_hw_fini(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + tonga_ih_irq_disable(adev); return 0; } -static int tonga_ih_suspend(struct amdgpu_device *adev) +static int tonga_ih_suspend(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + return tonga_ih_hw_fini(adev); } -static int tonga_ih_resume(struct amdgpu_device *adev) +static int tonga_ih_resume(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + return tonga_ih_hw_init(adev); } -static bool tonga_ih_is_idle(struct amdgpu_device *adev) +static bool tonga_ih_is_idle(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 tmp = RREG32(mmSRBM_STATUS); if (REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY)) @@ -338,10 +351,11 @@ static bool tonga_ih_is_idle(struct amdgpu_device *adev) return true; } -static int tonga_ih_wait_for_idle(struct amdgpu_device *adev) +static int tonga_ih_wait_for_idle(void *handle) { unsigned i; u32 tmp; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; for (i = 0; i < adev->usec_timeout; i++) { /* read MC_STATUS */ @@ -353,8 +367,10 @@ static int tonga_ih_wait_for_idle(struct amdgpu_device *adev) return -ETIMEDOUT; } -static void tonga_ih_print_status(struct amdgpu_device *adev) +static void tonga_ih_print_status(void *handle) { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + dev_info(adev->dev, "TONGA IH registers\n"); dev_info(adev->dev, " SRBM_STATUS=0x%08X\n", RREG32(mmSRBM_STATUS)); @@ -380,9 +396,10 @@ static void tonga_ih_print_status(struct amdgpu_device *adev) RREG32(mmIH_RB_WPTR)); } -static int tonga_ih_soft_reset(struct amdgpu_device *adev) +static int tonga_ih_soft_reset(void *handle) { u32 srbm_soft_reset = 0; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 tmp = RREG32(mmSRBM_STATUS); if (tmp & SRBM_STATUS__IH_BUSY_MASK) @@ -413,21 +430,19 @@ static int tonga_ih_soft_reset(struct amdgpu_device *adev) return 0; } -static int tonga_ih_set_clockgating_state(struct amdgpu_device *adev, - enum amdgpu_clockgating_state state) +static int tonga_ih_set_clockgating_state(void *handle, + enum amd_clockgating_state state) { - // TODO return 0; } -static int tonga_ih_set_powergating_state(struct amdgpu_device *adev, - enum amdgpu_powergating_state state) +static int tonga_ih_set_powergating_state(void *handle, + enum amd_powergating_state state) { - // TODO return 0; } -const struct amdgpu_ip_funcs tonga_ih_ip_funcs = { +const struct amd_ip_funcs tonga_ih_ip_funcs = { .early_init = tonga_ih_early_init, .late_init = NULL, .sw_init = tonga_ih_sw_init, |