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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2019-04-25 12:36:09 +0000 |
|---|---|---|
| committer | Sam Ravnborg <sam@ravnborg.org> | 2019-06-04 23:32:15 +0200 |
| commit | a6eca2abdd4297ec635e8f7a573ef070be2824d7 (patch) | |
| tree | d07bae2bf56c65b01af734d07620aa0107945a3e /drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | |
| parent | 3b295cb1a411d9c82bbfaa66bc17a8508716ed07 (diff) | |
| download | linux-a6eca2abdd4297ec635e8f7a573ef070be2824d7.tar.gz linux-a6eca2abdd4297ec635e8f7a573ef070be2824d7.tar.bz2 linux-a6eca2abdd4297ec635e8f7a573ef070be2824d7.zip | |
drm: atmel-hlcdc: add config option for clock selection
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1556195748-11106-2-git-send-email-claudiu.beznea@microchip.com
Diffstat (limited to 'drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h')
| -rw-r--r-- | drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h index 70bd540d644e..0155efb9c443 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h @@ -328,6 +328,7 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) * @max_hpw: maximum horizontal back/front porch width * @conflicting_output_formats: true if RGBXXX output formats conflict with * each other. + * @fixed_clksrc: true if clock source is fixed * @layers: a layer description table describing available layers * @nlayers: layer description table size */ @@ -340,6 +341,7 @@ struct atmel_hlcdc_dc_desc { int max_vpw; int max_hpw; bool conflicting_output_formats; + bool fixed_clksrc; const struct atmel_hlcdc_layer_desc *layers; int nlayers; }; |