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| author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2016-11-08 01:00:57 +0000 |
|---|---|---|
| committer | Archit Taneja <architt@codeaurora.org> | 2016-11-24 14:27:15 +0530 |
| commit | 2761ba6c0925ca9c5b917a95f68135d9dce443fb (patch) | |
| tree | dd3770f4efea930015e2317870e2ae875babffc1 /drivers/gpu/drm/bridge/dw-hdmi.h | |
| parent | 2db86dfcefbb7f6d7586dbd16a0b2819a2aad149 (diff) | |
| download | linux-2761ba6c0925ca9c5b917a95f68135d9dce443fb.tar.gz linux-2761ba6c0925ca9c5b917a95f68135d9dce443fb.tar.bz2 linux-2761ba6c0925ca9c5b917a95f68135d9dce443fb.zip | |
drm: bridge: add DesignWare HDMI I2S audio support
Current dw-hdmi is supporting sound via AHB bus, but it has
I2S audio feature too. This patch adds I2S audio support to dw-hdmi.
This HDMI I2S is supported by using ALSA SoC common HDMI encoder
driver.
Tested-by: Jose Abreu <joabreu@synopsys.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/8737j2bxba.wl%kuninori.morimoto.gx@renesas.com
Diffstat (limited to 'drivers/gpu/drm/bridge/dw-hdmi.h')
| -rw-r--r-- | drivers/gpu/drm/bridge/dw-hdmi.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h index 6aadc840e888..55135bbd0c16 100644 --- a/drivers/gpu/drm/bridge/dw-hdmi.h +++ b/drivers/gpu/drm/bridge/dw-hdmi.h @@ -545,6 +545,9 @@ #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR 0x7E12 enum { +/* CONFIG0_ID field values */ + HDMI_CONFIG0_I2S = 0x10, + /* CONFIG1_ID field values */ HDMI_CONFIG1_AHB = 0x01, @@ -891,6 +894,17 @@ enum { HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08, HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04, +/* AUD_CONF0 field values */ + HDMI_AUD_CONF0_SW_RESET = 0x80, + HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F, + +/* AUD_CONF1 field values */ + HDMI_AUD_CONF1_MODE_I2S = 0x00, + HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02, + HDMI_AUD_CONF1_MODE_LEFT_J = 0x04, + HDMI_AUD_CONF1_WIDTH_16 = 0x10, + HDMI_AUD_CONF1_WIDTH_24 = 0x18, + /* AUD_CTS3 field values */ HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5, HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0, @@ -905,6 +919,12 @@ enum { HDMI_AUD_CTS3_CTS_MANUAL = 0x10, HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f, +/* HDMI_AUD_INPUTCLKFS field values */ + HDMI_AUD_INPUTCLKFS_128FS = 0, + HDMI_AUD_INPUTCLKFS_256FS = 1, + HDMI_AUD_INPUTCLKFS_512FS = 2, + HDMI_AUD_INPUTCLKFS_64FS = 4, + /* AHB_DMA_CONF0 field values */ HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7, HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80, |