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authorZhao Yan <yan.y.zhao@intel.com>2017-03-02 15:12:47 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-03-02 15:26:06 +0800
commit4ec3dd89052a437304e1451733c989b8cec681af (patch)
tree10ef68635118d9908dbb3d59c8b01cae07c69acd /drivers/gpu/drm/i915/gvt/handlers.c
parentb6b6fbc8310e1b12b05717da9df6953b138f812b (diff)
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drm/i915/gvt: fix an error for F_RO flag
the ro_mask is not stored into each mmio entry Fixes: 12d14cc43b34 ("drm/i915/gvt: Introduce a framework for tracking HW registers.") Signed-off-by: Zhao Yan <yan.y.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 548aedfbd402..8e43395c748a 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -121,6 +121,7 @@ static int new_mmio_info(struct intel_gvt *gvt,
info->size = size;
info->length = (i + 4) < end ? 4 : (end - i);
info->addr_mask = addr_mask;
+ info->ro_mask = ro_mask;
info->device = device;
info->read = read ? read : intel_vgpu_default_mmio_read;
info->write = write ? write : intel_vgpu_default_mmio_write;