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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-07-21 18:28:30 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-07-21 18:30:22 +0100 |
| commit | b12e0ee2080c093a08243726f0f3c57fddf954a5 (patch) | |
| tree | 86b0ee5d593c688be24e0f197c28e3999ff2d88a /drivers/gpu/drm/i915/i915_drv.c | |
| parent | 65fe29eeec71d3e50870c5048d2c79bc9a477a76 (diff) | |
| download | linux-b12e0ee2080c093a08243726f0f3c57fddf954a5.tar.gz linux-b12e0ee2080c093a08243726f0f3c57fddf954a5.tar.bz2 linux-b12e0ee2080c093a08243726f0f3c57fddf954a5.zip | |
drm/i915: Enable RC6 immediately
Now that PCU communication is reasonably fast, we do not need to defer
RC6 initialisation to a workqueue.
References: https://bugs.freedesktop.org/show_bug.cgi?id=97017
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 83afdd0597b5..84e4018b18a7 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1630,7 +1630,6 @@ static int i915_drm_resume(struct drm_device *dev) intel_opregion_notify_adapter(dev_priv, PCI_D0); - intel_autoenable_gt_powersave(dev_priv); drm_kms_helper_poll_enable(dev); enable_rpm_wakeref_asserts(dev_priv); @@ -1812,7 +1811,8 @@ int i915_reset(struct drm_i915_private *dev_priv) * previous concerns that it doesn't respond well to some forms * of re-init after reset. */ - intel_autoenable_gt_powersave(dev_priv); + if (INTEL_GEN(dev_priv) > 5) + intel_enable_gt_powersave(dev_priv); return 0; @@ -2440,6 +2440,7 @@ static int intel_runtime_resume(struct device *device) i915_gem_init_swizzling(dev); intel_runtime_pm_enable_interrupts(dev_priv); + intel_enable_gt_powersave(dev_priv); /* * On VLV/CHV display interrupts are part of the display |