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authorDave Airlie <airlied@redhat.com>2010-04-20 13:11:45 +1000
committerDave Airlie <airlied@redhat.com>2010-04-20 13:11:45 +1000
commit97921a5b03d40681b3aed620a5e719710336c6df (patch)
tree33d6badc2afb50e87cbd232549c7708596ac12a7 /drivers/gpu/drm/i915/i915_drv.h
parent01bf0b64579ead8a82e7cfc32ae44bc667e7ad0f (diff)
parente15831656778d032f3c7655949f8cc3997f2b04a (diff)
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Merge remote branch 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next into drm-core-next
* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits) agp/intel-gtt: kill previous_size assignments agp/intel-gtt: kill intel_i830_tlbflush agp/intel: split out gmch/gtt probe, part 1 agp/intel: kill mutli_gmch_chip agp/intel: uncoditionally reconfigure driver on resume agp/intel: split out the GTT support agp/intel: introduce intel-agp.h header file drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect() drm/i915/pch: Use minimal number of FDI lanes (v2) drm/i915: Add the support of memory self-refresh on Ironlake drm/i915: Move Pineview CxSR and watermark code into update_wm hook. drm/i915: Only save/restore FBC on the platform that supports FBC drm/i915: Fix the incorrect argument for SDVO SET_TV_format command drm/i915: Add support of SDVO on Ibexpeak PCH drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on). drm/i915: do not read uninitialized ->dev_private Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output." drm/i915: implement multifunction SDVO device support drm/i915: remove unused intel_pipe_get_connector() drm/i915: remove connector object in old output structure ...
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6960849522f8..790fef32afef 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -221,6 +221,11 @@ enum no_fbc_reason {
FBC_NOT_TILED, /* buffer not tiled */
};
+enum intel_pch {
+ PCH_IBX, /* Ibexpeak PCH */
+ PCH_CPT, /* Cougarpoint PCH */
+};
+
typedef struct drm_i915_private {
struct drm_device *dev;
@@ -331,6 +336,9 @@ typedef struct drm_i915_private {
/* Display functions */
struct drm_i915_display_funcs display;
+ /* PCH chipset type */
+ enum intel_pch pch_type;
+
/* Register state */
bool modeset_on_lid;
u8 saveLBB;
@@ -992,6 +1000,9 @@ extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
extern void i8xx_disable_fbc(struct drm_device *dev);
extern void g4x_disable_fbc(struct drm_device *dev);
+extern void intel_detect_pch (struct drm_device *dev);
+extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
+
/**
* Lock test for when it's just for synchronization of ring access.
*
@@ -1123,7 +1134,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
#define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev))
#define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \
- !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
+ !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev) && \
+ !IS_GEN6(dev))
#define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)
/* dsparb controlled by hw only */
#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
@@ -1136,6 +1148,9 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define HAS_PCH_SPLIT(dev) (IS_IRONLAKE(dev) || \
IS_GEN6(dev))
+#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
+#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
+
#define PRIMARY_RINGBUFFER_SIZE (128*1024)
#endif