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authorEric Anholt <eric@anholt.net>2009-07-10 13:02:26 -0700
committerEric Anholt <eric@anholt.net>2009-07-10 14:10:58 -0700
commitd05ca301997c94c2ef3c112b15319d13fa8cddab (patch)
tree5455f4c87ef8b66e390b587799922535778ff822 /drivers/gpu/drm/i915/i915_gem_tiling.c
parent901782b21ecb2af4dde1598b3142bf0e80b20853 (diff)
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drm/i915: Zap the GTT mapping when transitioning from untiled to tiled.
As of 52dc7d32b88156248167864f77a9026abe27b432, we could leave an old linear GTT mapping in place, so that apps trying to GTT-mapped write in tiled data wouldn't get the fence added, and garbage would get displayed. Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index daeae62e1c28..a2d527b22ec4 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -521,6 +521,12 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
goto err;
}
+ /* If we've changed tiling, GTT-mappings of the object
+ * need to re-fault to ensure that the correct fence register
+ * setup is in place.
+ */
+ i915_gem_release_mmap(obj);
+
obj_priv->tiling_mode = args->tiling_mode;
obj_priv->stride = args->stride;
}