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authorBen Widawsky <ben@bwidawsk.net>2011-04-25 11:23:07 -0700
committerKeith Packard <keithp@keithp.com>2011-05-10 13:56:46 -0700
commitfcca7926299944841569515da321bef9655b7703 (patch)
tree3d3961db5e3d1821bd68c3c09365f9e557e61d55 /drivers/gpu/drm/i915/i915_irq.c
parentb7287d8054d219b3009f7ca82edf24f89fd363e5 (diff)
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drm/i915: reference counted forcewake
Provide a reference count to track the forcewake state of the GPU and give a safe mechanism for userspace to wake the GT. This also potentially saves a UC read if the GT is known to be awake already. The reference count is atomic, but the register access and hardware wake sequence is protected by struct_mutex. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6225c336de30..edd208e47308 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -396,7 +396,6 @@ static void gen6_pm_irq_handler(struct drm_device *dev)
I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,
I915_READ(GEN6_RP_INTERRUPT_LIMITS) & ~0x3f0000);
}
-
}
gen6_set_rps(dev, new_delay);