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| author | Deepak M <m.deepak@intel.com> | 2017-02-17 18:13:34 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2017-02-28 11:53:35 +0200 |
| commit | bcc65700484115dc4f80817de91dc86eeeb8b361 (patch) | |
| tree | 9565f1930d56da420777373677aa24a6da1df03d /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 09a568e7ac2c053a2f51653deb11744d133d41a4 (diff) | |
| download | linux-bcc65700484115dc4f80817de91dc86eeeb8b361.tar.gz linux-bcc65700484115dc4f80817de91dc86eeeb8b361.tar.bz2 linux-bcc65700484115dc4f80817de91dc86eeeb8b361.zip | |
drm/i915/glk: Program txesc clock divider for GLK
v2: Addressed Jani's Review comments(renamed bit field macros)
Txesc clock divider is calculated and programmed
for geminilake platform.
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1487335415-14766-7-git-send-email-madhav.chauhan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 89093efc9b42..1343170d8f5c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8251,6 +8251,11 @@ enum { #define _MIPI_PORT(port, a, c) _PORT3(port, a, 0, c) /* ports A and C only */ #define _MMIO_MIPI(port, a, c) _MMIO(_MIPI_PORT(port, a, c)) +#define MIPIO_TXESC_CLK_DIV1 _MMIO(0x160004) +#define GLK_TX_ESC_CLK_DIV1_MASK 0x3FF +#define MIPIO_TXESC_CLK_DIV2 _MMIO(0x160008) +#define GLK_TX_ESC_CLK_DIV2_MASK 0x3FF + /* BXT MIPI clock controls */ #define BXT_MAX_VAR_OUTPUT_KHZ 39500 |