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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-11 10:30:10 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-23 07:05:15 +0200 |
| commit | 1fcc9d1cf3c72ec7c7a3253b50b8e44f95f3f616 (patch) | |
| tree | c41f23d11c84faa4f5d6ca945fe368312970f5e3 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | 9a603f48fa2e0760d043bd66f4dc62055ea8c745 (diff) | |
| download | linux-1fcc9d1cf3c72ec7c7a3253b50b8e44f95f3f616.tar.gz linux-1fcc9d1cf3c72ec7c7a3253b50b8e44f95f3f616.tar.bz2 linux-1fcc9d1cf3c72ec7c7a3253b50b8e44f95f3f616.zip | |
drm/i915: Add a FIXME about drrs/psr interactions
Can't review this right now due to lack of DRRS code.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6359005180f0..4017406b810d 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4104,6 +4104,11 @@ void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate) return; } + /* + * FIXME: This needs proper synchronization with psr state. But really + * hard to tell without seeing the user of this function of this code. + * Check locking and ordering once that lands. + */ if (INTEL_INFO(dev)->gen < 8 && intel_edp_is_psr_enabled(dev)) { DRM_DEBUG_KMS("DRRS is disabled as PSR is enabled\n"); return; |