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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-01-24 15:29:55 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-24 23:45:03 +0100
commitd811215004dbcc213e70eef94541aa10a2258aef (patch)
treec0b285a8e72135c33275f5114f654ae118e545dd /drivers/gpu/drm/i915/intel_i2c.c
parent54d9d493ce08a7b106336c7393a7f7d3f2b2d9c0 (diff)
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drm/i915: GPIO/GMBUS registers need an offset on VLV
GPIO/GMBUS registers must be offset on VLV, so simply adjust gpio_mmio_base to include the correct offset. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 7f0904170963..acf8aec9ada7 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -515,6 +515,8 @@ int intel_setup_gmbus(struct drm_device *dev)
if (HAS_PCH_SPLIT(dev))
dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA;
+ else if (IS_VALLEYVIEW(dev))
+ dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;
else
dev_priv->gpio_mmio_base = 0;