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author | Michel Thierry <michel.thierry@intel.com> | 2014-07-24 17:04:38 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-08-14 22:10:59 +0200 |
commit | acdd884a2e1b873995c120d5eabd8cab77f48f20 (patch) | |
tree | 36a39235bd890e4f7ca5ea081c6453891d91fcb7 /drivers/gpu/drm/i915/intel_lrc.h | |
parent | ae1250b9da308acd16554365d125b4afb795b825 (diff) | |
download | linux-acdd884a2e1b873995c120d5eabd8cab77f48f20.tar.gz linux-acdd884a2e1b873995c120d5eabd8cab77f48f20.tar.bz2 linux-acdd884a2e1b873995c120d5eabd8cab77f48f20.zip |
drm/i915/bdw: Two-stage execlist submit process
Context switch (and execlist submission) should happen only when
other contexts are not active, otherwise pre-emption occurs.
To assure this, we place context switch requests in a queue and those
request are later consumed when the right context switch interrupt is
received (still TODO).
v2: Use a spinlock, do not remove the requests on unqueue (wait for
context switch completion).
Signed-off-by: Thomas Daniel <thomas.daniel@intel.com>
v3: Several rebases and code changes. Use unique ID.
v4:
- Move the queue/lock init to the late ring initialization.
- Damien's kmalloc review comments: check return, use sizeof(*req),
do not cast.
v5:
- Do not reuse drm_i915_gem_request. Instead, create our own.
- New namespace.
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v1)
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> (v2-v5)
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[davnet: Checkpatch + wash-up s/BUG_ON/WARN_ON/.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h index 69605b158235..3c389b3a2b75 100644 --- a/drivers/gpu/drm/i915/intel_lrc.h +++ b/drivers/gpu/drm/i915/intel_lrc.h @@ -59,4 +59,12 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file, u64 exec_start, u32 flags); u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj); +struct intel_ctx_submit_request { + struct intel_context *ctx; + struct intel_engine_cs *ring; + u32 tail; + + struct list_head execlist_link; +}; + #endif /* _INTEL_LRC_H_ */ |