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| author | Linus Walleij <linus.walleij@linaro.org> | 2019-11-22 08:25:08 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-11-24 18:04:08 +0100 |
| commit | b23490cbb2027bb37287d73a050e3a9c2e4e1f39 (patch) | |
| tree | 81d3d511a1d1a15d091835759899a5caab150bb5 /drivers/gpu/drm/mcde | |
| parent | ce9cde04205a8f376e01d75a156f8810a98a2405 (diff) | |
| download | linux-b23490cbb2027bb37287d73a050e3a9c2e4e1f39.tar.gz linux-b23490cbb2027bb37287d73a050e3a9c2e4e1f39.tar.bz2 linux-b23490cbb2027bb37287d73a050e3a9c2e4e1f39.zip | |
drm/mcde: Do not needlessly logically and with 3
The i index i always 0..3 in these statements so there
is no need to tag "& 3" to clamp it to 3 here. Make
the operator precedence explicit even if it's correct
as it is, the paranthesis creates less cognitive stress
for humans.
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20191122072508.25677-1-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/mcde')
| -rw-r--r-- | drivers/gpu/drm/mcde/mcde_dsi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c index 58b1e62f7d68..42fff811653e 100644 --- a/drivers/gpu/drm/mcde/mcde_dsi.c +++ b/drivers/gpu/drm/mcde/mcde_dsi.c @@ -246,25 +246,25 @@ static ssize_t mcde_dsi_host_transfer(struct mipi_dsi_host *host, if (txlen > 0) { val = 0; for (i = 0; i < 4 && i < txlen; i++) - val |= tx[i] << (i & 3) * 8; + val |= tx[i] << (i * 8); } writel(val, d->regs + DSI_DIRECT_CMD_WRDAT0); if (txlen > 4) { val = 0; for (i = 0; i < 4 && (i + 4) < txlen; i++) - val |= tx[i + 4] << (i & 3) * 8; + val |= tx[i + 4] << (i * 8); writel(val, d->regs + DSI_DIRECT_CMD_WRDAT1); } if (txlen > 8) { val = 0; for (i = 0; i < 4 && (i + 8) < txlen; i++) - val |= tx[i + 8] << (i & 3) * 8; + val |= tx[i + 8] << (i * 8); writel(val, d->regs + DSI_DIRECT_CMD_WRDAT2); } if (txlen > 12) { val = 0; for (i = 0; i < 4 && (i + 12) < txlen; i++) - val |= tx[i + 12] << (i & 3) * 8; + val |= tx[i + 12] << (i * 8); writel(val, d->regs + DSI_DIRECT_CMD_WRDAT3); } |