diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2014-05-31 01:48:06 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-06-11 16:11:10 +1000 |
| commit | 4874322e78d505d38c8d4481118af5c9f0e8306d (patch) | |
| tree | e5e995df297cb2ad3b15723afd546237b30b2a7f /drivers/gpu/drm/nouveau/nv50_display.c | |
| parent | 8894f4919bc43f821775db2cfff4b917871b2102 (diff) | |
| download | linux-4874322e78d505d38c8d4481118af5c9f0e8306d.tar.gz linux-4874322e78d505d38c8d4481118af5c9f0e8306d.tar.bz2 linux-4874322e78d505d38c8d4481118af5c9f0e8306d.zip | |
drm/nouveau/dp: fix support for dpms
SOR_PWR has no effect to power-off DP links, unlike other SOR protocols.
Instead, on the source side, we cut power to the lanes after having put
the sink into D3. Link training takes care of everything required to
bring it back again.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_display.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_display.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 3c58854aff03..21c72480df82 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -26,6 +26,7 @@ #include <drm/drmP.h> #include <drm/drm_crtc_helper.h> +#include <drm/drm_dp_helper.h> #include "nouveau_drm.h" #include "nouveau_dma.h" @@ -1722,7 +1723,7 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode) struct drm_device *dev = encoder->dev; struct nv50_disp *disp = nv50_disp(dev); struct drm_encoder *partner; - int or = nv_encoder->or; + u32 mthd; nv_encoder->last_dpms = mode; @@ -1740,7 +1741,17 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode) } } - nv_call(disp->core, NV50_DISP_SOR_PWR + or, (mode == DRM_MODE_DPMS_ON)); + mthd = (ffs(nv_encoder->dcb->sorconf.link) - 1) << 2; + mthd |= nv_encoder->or; + + if (nv_encoder->dcb->type == DCB_OUTPUT_DP) { + nv_call(disp->core, NV50_DISP_SOR_PWR | mthd, 1); + mthd |= NV94_DISP_SOR_DP_PWR; + } else { + mthd |= NV50_DISP_SOR_PWR; + } + + nv_call(disp->core, mthd, (mode == DRM_MODE_DPMS_ON)); } static bool |