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authorFrancisco Jerez <currojerez@riseup.net>2010-09-28 20:47:58 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-10-05 09:58:43 +1000
commitcd2fb2e9e0a6a3273d353b18e4bdd21cc0482724 (patch)
tree8f356e8abe542f9f873d84a7e4d7845fd0cb2307 /drivers/gpu/drm/nouveau/nvreg.h
parent23357e4da0e1b39c9dfd64a1db0deafc6d70b554 (diff)
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drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.
It's an unrelated PLL filtering control bit, leave it alone when changing the CRTC-encoder binding. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvreg.h')
-rw-r--r--drivers/gpu/drm/nouveau/nvreg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h
index ad64673ace1f..881f8a585613 100644
--- a/drivers/gpu/drm/nouveau/nvreg.h
+++ b/drivers/gpu/drm/nouveau/nvreg.h
@@ -263,6 +263,7 @@
# define NV_CIO_CRE_HCUR_ADDR1_ADR 7:2
# define NV_CIO_CRE_LCD__INDEX 0x33
# define NV_CIO_CRE_LCD_LCD_SELECT 0:0
+# define NV_CIO_CRE_LCD_ROUTE_MASK 0x3b
# define NV_CIO_CRE_DDC0_STATUS__INDEX 0x36
# define NV_CIO_CRE_DDC0_WR__INDEX 0x37
# define NV_CIO_CRE_ILACE__INDEX 0x39 /* interlace */