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authorBen Skeggs <bskeggs@redhat.com>2011-11-13 03:43:30 +1000
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 19:01:37 +1000
commit84e052e626d88c04c03f79dd95708e556d018d97 (patch)
treef9ae0deec3e29dabd6ff98350dda0b466f52c477 /drivers/gpu/drm/nouveau
parent8a46438a6a7492296c5dbfcc8e4a5106ab37bca8 (diff)
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drm/nvd0/disp: handle yet another interrupt
Spotted while messing with overlay channels (probably as a result of sending a similar "disable" sequence as we do for the flip channels). The value in 0x61008c was 0x20, which one would reasonably guess is "bit 5 == something to report about evo channel 5" - but who knows. Spotted the binary driver getting this too, and it appears to not do anything exciting as a result. So, handle it the same way and avoid an IRQ storm. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/nvd0_display.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index 8fceebd110e6..51e073828471 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -1585,6 +1585,12 @@ nvd0_display_intr(struct drm_device *dev)
struct nvd0_display *disp = nvd0_display(dev);
u32 intr = nv_rd32(dev, 0x610088);
+ if (intr & 0x00000001) {
+ u32 stat = nv_rd32(dev, 0x61008c);
+ nv_wr32(dev, 0x61008c, stat);
+ intr &= ~0x00000001;
+ }
+
if (intr & 0x00000002) {
u32 stat = nv_rd32(dev, 0x61009c);
int chid = ffs(stat) - 1;