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| author | Alex Deucher <alexander.deucher@amd.com> | 2012-02-02 10:11:12 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-02-03 09:41:35 +0000 |
| commit | f2746f83d50287fdb6768e0f20168c64b6a7c9cb (patch) | |
| tree | 867c02d19bd230b9842132941a4199f21ebfc49c /drivers/gpu/drm | |
| parent | c9068eb296fc682513f8612168f605c169b773e4 (diff) | |
| download | linux-f2746f83d50287fdb6768e0f20168c64b6a7c9cb.tar.gz linux-f2746f83d50287fdb6768e0f20168c64b6a7c9cb.tar.bz2 linux-f2746f83d50287fdb6768e0f20168c64b6a7c9cb.zip | |
drm/radeon/kms: add r1xx/r2xx CS support for tiled textures
Not likely this will be implemented anytime soon, but for
completeness...
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r200.c | 12 |
2 files changed, 22 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 7dd6a1c47345..99bb00649357 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -1558,7 +1558,17 @@ static int r100_packet0_check(struct radeon_cs_parser *p, r100_cs_dump_packet(p, pkt); return r; } - ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); + if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { + if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) + tile_flags |= RADEON_TXO_MACRO_TILE; + if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) + tile_flags |= RADEON_TXO_MICRO_TILE_X2; + + tmp = idx_value & ~(0x7 << 2); + tmp |= tile_flags; + ib[idx] = tmp + ((u32)reloc->lobj.gpu_offset); + } else + ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); track->textures[i].robj = reloc->robj; track->tex_dirty = true; break; diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index 2f44397f6df7..a59cc474d537 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c @@ -215,7 +215,17 @@ int r200_packet0_check(struct radeon_cs_parser *p, r100_cs_dump_packet(p, pkt); return r; } - ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); + if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { + if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) + tile_flags |= R200_TXO_MACRO_TILE; + if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) + tile_flags |= R200_TXO_MICRO_TILE; + + tmp = idx_value & ~(0x7 << 2); + tmp |= tile_flags; + ib[idx] = tmp + ((u32)reloc->lobj.gpu_offset); + } else + ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); track->textures[i].robj = reloc->robj; track->tex_dirty = true; break; |