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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-11 16:27:55 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-25 18:23:50 +0200
commita7e806de4e53f7496a6701194d736a92a80db5b3 (patch)
tree5f74b1833b04eff41906786d153a821f17eb754d /drivers/gpu/drm
parente9808edd98679680804dfbc42c5ee8f1aa91f617 (diff)
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drm/i915: create VLV_DSIPLAY_BASE #define
Will be used more in the next patch. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ab3b9d38e153..ff569cc35376 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1031,7 +1031,7 @@ static bool IS_DISPLAYREG(u32 reg)
* This should make it easier to transition modules over to the
* new register block scheme, since we can do it incrementally.
*/
- if (reg >= 0x180000)
+ if (reg >= VLV_DISPLAY_BASE)
return false;
if (reg >= RENDER_RING_BASE &&
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0d1fa64b56dc..d122c93643e6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -529,6 +529,8 @@
#define GFX_PSMI_GRANULARITY (1<<10)
#define GFX_PPGTT_ENABLE (1<<9)
+#define VLV_DISPLAY_BASE 0x180000
+
#define SCPD0 0x0209c /* 915+ only */
#define IER 0x020a0
#define IIR 0x020a4