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authorMaxime Jourdan <mjourdan@baylibre.com>2019-03-11 11:51:43 +0100
committerNeil Armstrong <narmstrong@baylibre.com>2019-03-20 09:28:38 +0100
commitdc5b961410242a322a7191be77ba9e50026e3825 (patch)
tree57b5909ad95a4f8f2d884f894202b387c9a922a9 /drivers/gpu/drm
parent29054230f3e11ea818eccfa7bb4e4b3e89544164 (diff)
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dt-bindings: display: amlogic, meson-vpu: exclusively use amlogic, canvas
When the DRM driver for the meson platform was created, the bindings required that the DMC register region was provided. Through those DMC registers, the display driver could configure an IP called "canvas", a video lookup table used by the display IP. It was later discovered that "canvas" is actually an IP shared by other components than display: video decoder, 2D engine.. and that it wasn't possible to keep the canvas code in DRM. Over the past few months, incremental efforts have been deployed to create a standalone meson-canvas driver [1], and the DRM driver was patched to optionally use it if present [2]. This is the final step of those efforts where we simply remove any control over DMC that the meson DRM driver has. Please note that this breaks compatibility with older DTs that only provide the DMC register range but not the amlogic,canvas node. [1] https://patchwork.kernel.org/cover/10573771/ [2] https://patchwork.freedesktop.org/series/52076/ Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190311105144.7276-2-mjourdan@baylibre.com
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