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authorMikko Perttunen <mperttunen@nvidia.com>2022-06-27 17:20:03 +0300
committerThierry Reding <treding@nvidia.com>2022-07-08 16:27:52 +0200
commit7afd1194a3cdb7ba5aa8d658b2d0655f61457c86 (patch)
tree8d21569d402ec1fe45e6a1250fa862812d0bba13 /drivers/gpu/host1x
parentee8f894f3fb326ac17b243441b8cbbb6fb0d0932 (diff)
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gpu: host1x: Program interrupt destinations on Tegra234
On Tegra234, each Host1x VM has 8 interrupt lines. Each syncpoint can be configured with which interrupt line should be used for threshold interrupt, allowing for load balancing. For now, to keep backwards compatibility, just set all syncpoints to the first interrupt. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x')
-rw-r--r--drivers/gpu/host1x/hw/intr_hw.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/hw/intr_hw.c b/drivers/gpu/host1x/hw/intr_hw.c
index f56375ee6e71..9acccdb139e6 100644
--- a/drivers/gpu/host1x/hw/intr_hw.c
+++ b/drivers/gpu/host1x/hw/intr_hw.c
@@ -76,6 +76,17 @@ static void intr_hw_init(struct host1x *host, u32 cpm)
/* update host clocks per usec */
host1x_sync_writel(host, cpm, HOST1X_SYNC_USEC_CLK);
#endif
+#if HOST1X_HW >= 8
+ u32 id;
+
+ /*
+ * Program threshold interrupt destination among 8 lines per VM,
+ * per syncpoint. For now, just direct all to the first interrupt
+ * line.
+ */
+ for (id = 0; id < host->info->nb_pts; id++)
+ host1x_sync_writel(host, 0, HOST1X_SYNC_SYNCPT_INTR_DEST(id));
+#endif
}
static int