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author | Alex Deucher <alexdeucher@gmail.com> | 2011-05-20 12:36:11 -0400 |
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committer | Dave Airlie <airlied@gmail.com> | 2011-05-22 20:20:41 +1000 |
commit | 2307790f0c8dea7d8052805a8209fbd67e815e72 (patch) | |
tree | d0038955a1b8c54f2820cbd372e7a72a1246a74c /drivers/gpu | |
parent | 6f15c506e0cec601fad9fabb7ded0d1811b8002f (diff) | |
download | linux-2307790f0c8dea7d8052805a8209fbd67e815e72.tar.gz linux-2307790f0c8dea7d8052805a8209fbd67e815e72.tar.bz2 linux-2307790f0c8dea7d8052805a8209fbd67e815e72.zip |
drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
For DP/eDP, always use the standard DP SS indices.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 42 |
1 files changed, 12 insertions, 30 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index f5819ba481d9..48f5ff023bca 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -942,42 +942,24 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode case ATOM_ENCODER_MODE_DP: /* DP/eDP */ dp_clock = dig_connector->dp_clock / 10; - if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) { - if (ASIC_IS_DCE4(rdev)) { - /* first try ASIC_INTERNAL_SS_ON_DP */ + if (ASIC_IS_DCE4(rdev)) + ss_enabled = + radeon_atombios_get_asic_ss_info(rdev, &ss, + ASIC_INTERNAL_SS_ON_DP, + dp_clock); + else { + if (dp_clock == 16200) { ss_enabled = - radeon_atombios_get_asic_ss_info(rdev, &ss, - ASIC_INTERNAL_SS_ON_DP, - dp_clock); + radeon_atombios_get_ppll_ss_info(rdev, &ss, + ATOM_DP_SS_ID2); if (!ss_enabled) ss_enabled = - radeon_atombios_get_asic_ss_info(rdev, &ss, - dig->lcd_ss_id, - dp_clock); + radeon_atombios_get_ppll_ss_info(rdev, &ss, + ATOM_DP_SS_ID1); } else ss_enabled = radeon_atombios_get_ppll_ss_info(rdev, &ss, - dig->lcd_ss_id); - } else { - if (ASIC_IS_DCE4(rdev)) - ss_enabled = - radeon_atombios_get_asic_ss_info(rdev, &ss, - ASIC_INTERNAL_SS_ON_DP, - dp_clock); - else { - if (dp_clock == 16200) { - ss_enabled = - radeon_atombios_get_ppll_ss_info(rdev, &ss, - ATOM_DP_SS_ID2); - if (!ss_enabled) - ss_enabled = - radeon_atombios_get_ppll_ss_info(rdev, &ss, - ATOM_DP_SS_ID1); - } else - ss_enabled = - radeon_atombios_get_ppll_ss_info(rdev, &ss, - ATOM_DP_SS_ID1); - } + ATOM_DP_SS_ID1); } break; case ATOM_ENCODER_MODE_LVDS: |