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author | AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> | 2021-01-09 14:51:08 +0100 |
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committer | Rob Clark <robdclark@chromium.org> | 2021-02-01 08:30:14 -0800 |
commit | 5c191fef4ce2fc4310d8174bd3861474919201e4 (patch) | |
tree | 5bb5b7b573c1590412d668cb1359a78fd942f012 /drivers/gpu | |
parent | c703d5789590935c573bbd080a2166b72d51a017 (diff) | |
download | linux-5c191fef4ce2fc4310d8174bd3861474919201e4.tar.gz linux-5c191fef4ce2fc4310d8174bd3861474919201e4.tar.bz2 linux-5c191fef4ce2fc4310d8174bd3861474919201e4.zip |
drm/msm/dsi_pll_10nm: Fix dividing the same numbers twice
In function dsi_pll_calc_dec_frac we are calculating the decimal
div start parameter by dividing the decimal multiple by the
fractional multiplier: the remainder of that operation is stored
to then get programmed to the fractional divider registers of
the PLL.
It's useless to call div_u64_rem to get the remainder and *then*
call div_u64 to get the division result, as the first is already
giving that result: let's fix it by just caring about the result
of div_u64_rem.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c index e4e9bf04b736..2820b3118720 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c @@ -172,9 +172,7 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_10nm *pll) multiplier = 1 << config->frac_bits; dec_multiple = div_u64(pll_freq * multiplier, divider); - div_u64_rem(dec_multiple, multiplier, &frac); - - dec = div_u64(dec_multiple, multiplier); + dec = div_u64_rem(dec_multiple, multiplier, &frac); if (pll_freq <= 1900000000UL) regs->pll_prop_gain_rate = 8; |