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| author | Basavaraj Natikar <Basavaraj.Natikar@amd.com> | 2021-06-18 13:48:36 +0530 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2021-06-24 14:28:03 +0200 |
| commit | f264481ad614dfd9aae59eeefa5fc664cdf173ae (patch) | |
| tree | e68879edbbe2fa346468399208795e66ef2d31e5 /drivers/hid/amd-sfh-hid/amd_sfh_pcie.h | |
| parent | 231bc539066760aaa44d46818c85b14ca2f56d9f (diff) | |
| download | linux-f264481ad614dfd9aae59eeefa5fc664cdf173ae.tar.gz linux-f264481ad614dfd9aae59eeefa5fc664cdf173ae.tar.bz2 linux-f264481ad614dfd9aae59eeefa5fc664cdf173ae.zip | |
HID: amd_sfh: Extend driver capabilities for multi-generation support
Initial driver support only covered the first generation of SFH
platforms. In order to support the future generations introduce
ops selection to distinguish the different platforms.
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Reviewed-by: Nehal Shah <nehal-bakulchandra.shah@amd.com>
Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/hid/amd-sfh-hid/amd_sfh_pcie.h')
| -rw-r--r-- | drivers/hid/amd-sfh-hid/amd_sfh_pcie.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.h b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.h index 489415f7c22c..6297d78c7aef 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.h +++ b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.h @@ -22,9 +22,13 @@ #define AMD_C2P_MSG1 0x10504 #define AMD_C2P_MSG2 0x10508 +#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) + /* MP2 P2C Message Registers */ #define AMD_P2C_MSG3 0x1068C /* Supported Sensors info */ +#define V2_STATUS 0x2 + /* SFH Command register */ union sfh_cmd_base { u32 ul; @@ -33,6 +37,15 @@ union sfh_cmd_base { u32 sensor_id : 8; u32 period : 16; } s; + struct { + u32 cmd_id : 4; + u32 intr_enable : 1; + u32 rsvd1 : 3; + u32 length : 7; + u32 mem_type : 1; + u32 sensor_id : 8; + u32 period : 8; + } cmd_v2; }; union sfh_cmd_param { @@ -61,6 +74,9 @@ struct amd_mp2_dev { struct pci_dev *pdev; struct amdtp_cl_data *cl_data; void __iomem *mmio; + const struct amd_mp2_ops *mp2_ops; + /* mp2 active control status */ + u32 mp2_acs; }; struct amd_mp2_sensor_info { @@ -69,10 +85,21 @@ struct amd_mp2_sensor_info { dma_addr_t dma_address; }; +enum mem_use_type { + USE_DRAM, + USE_C2P_REG, +}; + void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx); void amd_stop_all_sensors(struct amd_mp2_dev *privdata); int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id); int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata); int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata); + +struct amd_mp2_ops { + void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); + void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx); + void (*stop_all)(struct amd_mp2_dev *privdata); +}; #endif |