summaryrefslogtreecommitdiffstats
path: root/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
diff options
context:
space:
mode:
authorSteve Wise <swise@opengridcomputing.com>2016-09-16 07:54:52 -0700
committerDoug Ledford <dledford@redhat.com>2016-10-07 16:54:40 -0400
commit49b53a93a64ab0aaec10851b004297a3ac885433 (patch)
tree6f252df36ba90d7baccddfbae6bb57d1ea6a4937 /drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
parent086de575c14239f77ea0dbf2370738a105c753ea (diff)
downloadlinux-49b53a93a64ab0aaec10851b004297a3ac885433.tar.gz
linux-49b53a93a64ab0aaec10851b004297a3ac885433.tar.bz2
linux-49b53a93a64ab0aaec10851b004297a3ac885433.zip
iw_cxgb4: add fast-path for small REG_MR operations
When processing a REG_MR work request, if fw supports the FW_RI_NSMR_TPTE_WR work request, and if the page list for this registration is <= 2 pages, and the current state of the mr is INVALID, then use FW_RI_NSMR_TPTE_WR to pass down a fully populated TPTE for FW to write. This avoids FW having to do an async read of the TPTE blocking the SQ until the read completes. To know if the current MR state is INVALID or not, iw_cxgb4 must track the state of each fastreg MR. The c4iw_mr struct state is updated as REG_MR and LOCAL_INV WRs are posted and completed, when a reg_mr is destroyed, and when RECV completions are processed that include a local invalidation. This optimization increases small IO IOPS for both iSER and NVMF. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw/cxgb4/t4fw_ri_api.h')
-rw-r--r--drivers/infiniband/hw/cxgb4/t4fw_ri_api.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
index 1e26669793c3..010c709ba3bb 100644
--- a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
+++ b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
@@ -669,6 +669,18 @@ struct fw_ri_fr_nsmr_wr {
#define FW_RI_FR_NSMR_WR_DCACPU_G(x) \
(((x) >> FW_RI_FR_NSMR_WR_DCACPU_S) & FW_RI_FR_NSMR_WR_DCACPU_M)
+struct fw_ri_fr_nsmr_tpte_wr {
+ __u8 opcode;
+ __u8 flags;
+ __u16 wrid;
+ __u8 r1[3];
+ __u8 len16;
+ __u32 r2;
+ __u32 stag;
+ struct fw_ri_tpte tpte;
+ __u64 pbl[2];
+};
+
struct fw_ri_inv_lstag_wr {
__u8 opcode;
__u8 flags;