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| author | Weihang Li <liweihang@huawei.com> | 2020-10-24 11:07:15 +0800 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2020-10-28 13:40:42 -0300 |
| commit | d6d91e46210f3adb7b6d4c667cb72bf847b5783a (patch) | |
| tree | 29ac84d10c640303036b72f20c4d918bc67ff69b /drivers/infiniband/hw/hns/hns_roce_main.c | |
| parent | 3f4e3d962dfda68e024d57cf2408cacf081cd9df (diff) | |
| download | linux-d6d91e46210f3adb7b6d4c667cb72bf847b5783a.tar.gz linux-d6d91e46210f3adb7b6d4c667cb72bf847b5783a.tar.bz2 linux-d6d91e46210f3adb7b6d4c667cb72bf847b5783a.zip | |
RDMA/hns: Add support for configuring GMV table
HIP09 supports to store SGID/SMAC/VLAN together in a table named GMV. The
driver needs to allocate memory for it and tell the information about this
region to hardware.
Link: https://lore.kernel.org/r/1603508836-33054-2-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/hns/hns_roce_main.c')
| -rw-r--r-- | drivers/infiniband/hw/hns/hns_roce_main.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index 6d2c383c4d64..92d0f29e2d92 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -651,8 +651,25 @@ static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) } } + if (hr_dev->caps.gmv_entry_sz) { + ret = hns_roce_init_hem_table(hr_dev, &hr_dev->gmv_table, + HEM_TYPE_GMV, + hr_dev->caps.gmv_entry_sz, + hr_dev->caps.gmv_entry_num, 1); + if (ret) { + dev_err(dev, + "failed to init gmv table memory, ret = %d\n", + ret); + goto err_unmap_cqc_timer; + } + } + return 0; +err_unmap_cqc_timer: + if (hr_dev->caps.cqc_timer_entry_sz) + hns_roce_cleanup_hem_table(hr_dev, &hr_dev->cqc_timer_table); + err_unmap_qpc_timer: if (hr_dev->caps.qpc_timer_entry_sz) hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qpc_timer_table); |