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| author | Steven L Kinney <Steven.Kinney@amd.com> | 2013-06-05 16:11:48 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2013-06-19 13:04:52 +0200 |
| commit | 30861ddc9cca479a7fc6a5efef4e5c69d6b274f4 (patch) | |
| tree | 69a11531b19c72b818c68a6b16e8854e563b7143 /drivers/iommu/amd_iommu_proto.h | |
| parent | ae0def05ed856343181bf1eca4fab3e09056df6d (diff) | |
| download | linux-30861ddc9cca479a7fc6a5efef4e5c69d6b274f4.tar.gz linux-30861ddc9cca479a7fc6a5efef4e5c69d6b274f4.tar.bz2 linux-30861ddc9cca479a7fc6a5efef4e5c69d6b274f4.zip | |
perf/x86/amd: Add IOMMU Performance Counter resource management
Add functionality to check the availability of the AMD IOMMU Performance
Counters and export this functionality to other core drivers, such as in this
case, a perf AMD IOMMU PMU. This feature is not bound to any specific AMD
family/model other than the presence of the IOMMU with P-C enabled.
The AMD IOMMU P-C support static counting only at this time.
Signed-off-by: Steven Kinney <steven.kinney@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1370466709-3212-2-git-send-email-suravee.suthikulpanit@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/iommu/amd_iommu_proto.h')
| -rw-r--r-- | drivers/iommu/amd_iommu_proto.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h index c294961bdd36..95ed6deae47f 100644 --- a/drivers/iommu/amd_iommu_proto.h +++ b/drivers/iommu/amd_iommu_proto.h @@ -56,6 +56,13 @@ extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); +/* IOMMU Performance Counter functions */ +extern bool amd_iommu_pc_supported(void); +extern u8 amd_iommu_pc_get_max_banks(u16 devid); +extern u8 amd_iommu_pc_get_max_counters(u16 devid); +extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, + u64 *value, bool is_write); + #define PPR_SUCCESS 0x0 #define PPR_INVALID 0x1 #define PPR_FAILURE 0xf |