diff options
| author | Agustin Vega-Frias <agustinv@codeaurora.org> | 2017-02-02 18:23:59 -0500 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-02-03 15:03:49 +0000 |
| commit | f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b (patch) | |
| tree | 7f5e93ccdd4eac18b6cb28dcb07af444f85cde01 /drivers/irqchip/Kconfig | |
| parent | d44fa3d46079dc095c1346fa6e5bc96dca1ead41 (diff) | |
| download | linux-f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b.tar.gz linux-f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b.tar.bz2 linux-f20cc9b00c7b71f9b5e970b6bd4ac93b0d9cfd5b.zip | |
irqchip/qcom: Add IRQ combiner driver
Driver for interrupt combiners in the Top-level Control and Status
Registers (TCSR) hardware block in Qualcomm Technologies chips.
An interrupt combiner in this block combines a set of interrupts by
OR'ing the individual interrupt signals into a summary interrupt
signal routed to a parent interrupt controller, and provides read-
only, 32-bit registers to query the status of individual interrupts.
The status bit for IRQ n is bit (n % 32) within register (n / 32)
of the given combiner. Thus, each combiner can be described as a set
of register offsets and the number of IRQs managed.
Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/Kconfig')
| -rw-r--r-- | drivers/irqchip/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index ae96731cd2fb..125528f39e92 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -283,3 +283,12 @@ config EZNPS_GIC config STM32_EXTI bool select IRQ_DOMAIN + +config QCOM_IRQ_COMBINER + bool "QCOM IRQ combiner support" + depends on ARCH_QCOM && ACPI + select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY + help + Say yes here to add support for the IRQ combiner devices embedded + in Qualcomm Technologies chips. |