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author | Julien Thierry <julien.thierry@arm.com> | 2019-01-31 14:58:44 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-02-06 10:05:18 +0000 |
commit | 3f1f3234bc2db1c16b9818b9a15a5d58ad45251c (patch) | |
tree | 5ebd1e626cf13bf5c92fe9ce85761092de2e6c43 /drivers/irqchip | |
parent | e99da7c6f51b487280406d8dc31cc7532cfb2017 (diff) | |
download | linux-3f1f3234bc2db1c16b9818b9a15a5d58ad45251c.tar.gz linux-3f1f3234bc2db1c16b9818b9a15a5d58ad45251c.tar.bz2 linux-3f1f3234bc2db1c16b9818b9a15a5d58ad45251c.zip |
irqchip/gic-v3: Switch to PMR masking before calling IRQ handler
Mask the IRQ priority through PMR and re-enable IRQs at CPU level,
allowing only higher priority interrupts to be received during interrupt
handling.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 0868a9d81c3c..8148a9250be2 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -356,6 +356,11 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs irqnr = gic_read_iar(); + if (gic_prio_masking_enabled()) { + gic_pmr_mask_irqs(); + gic_arch_enable_irqs(); + } + if (likely(irqnr > 15 && irqnr < 1020) || irqnr >= 8192) { int err; |