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| author | Seungwon Jeon <tgih.jun@samsung.com> | 2014-03-14 21:12:43 +0900 |
|---|---|---|
| committer | Chris Ball <chris@printf.net> | 2014-04-20 17:00:01 -0400 |
| commit | cab3a8021bf0dc790071514a07b0b6f745b1814a (patch) | |
| tree | e9873b9acc7620f497fb9c4484c37a30614360f5 /drivers/mmc/host/dw_mmc-exynos.c | |
| parent | 1a0ae377bf50ed913f2b71b71e3e2cb3fc9eab30 (diff) | |
| download | linux-cab3a8021bf0dc790071514a07b0b6f745b1814a.tar.gz linux-cab3a8021bf0dc790071514a07b0b6f745b1814a.tar.bz2 linux-cab3a8021bf0dc790071514a07b0b6f745b1814a.zip | |
mmc: dw_mmc: clarify DDR timing mode between SD-UHS and eMMC
Replaced UHS_DDR50 with MMC_DDR52. And MMC_CAP_UHS_DDR50
is removed because of non-implementation of UHS signaling.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'drivers/mmc/host/dw_mmc-exynos.c')
| -rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 3423c5ed50c7..a67e784b3a95 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -187,7 +187,7 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios) unsigned long actual; u8 div = priv->ciu_div + 1; - if (ios->timing == MMC_TIMING_UHS_DDR50) { + if (ios->timing == MMC_TIMING_MMC_DDR52) { mci_writel(host, CLKSEL, priv->ddr_timing); /* Should be double rate for DDR mode */ if (ios->bus_width == MMC_BUS_WIDTH_8) @@ -386,8 +386,7 @@ static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode, /* Common capabilities of Exynos4/Exynos5 SoC */ static unsigned long exynos_dwmmc_caps[4] = { - MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR | - MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23, + MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23, MMC_CAP_CMD23, MMC_CAP_CMD23, MMC_CAP_CMD23, |