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authorDong Aisheng <b29396@freescale.com>2013-10-30 22:09:49 +0800
committerChris Ball <cjb@laptop.org>2013-11-26 16:34:03 -0500
commit7dd109ef4f58ca09c18809e981658ffeaca471f8 (patch)
tree124c42bf079a7aef6c07de9a4a7f6278b5222679 /drivers/mmc/host
parent2b558c13df82b2ede7a016f00bc9ebf534ddb301 (diff)
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mmc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read function
Used to read out the correct value of SDHCI_TRANSFER_MODE register for upper layer. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 461a4c3f4ef7..2be77e0dcc4e 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -385,6 +385,22 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
return ret;
}
+ if (unlikely(reg == SDHCI_TRANSFER_MODE)) {
+ if (esdhc_is_usdhc(imx_data)) {
+ u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
+ ret = m & ESDHC_MIX_CTRL_SDHCI_MASK;
+ /* Swap AC23 bit */
+ if (m & ESDHC_MIX_CTRL_AC23EN) {
+ ret &= ~ESDHC_MIX_CTRL_AC23EN;
+ ret |= SDHCI_TRNS_AUTO_CMD23;
+ }
+ } else {
+ ret = readw(host->ioaddr + SDHCI_TRANSFER_MODE);
+ }
+
+ return ret;
+ }
+
return readw(host->ioaddr + reg);
}