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| author | Dong Aisheng <b29396@freescale.com> | 2013-11-04 16:38:27 +0800 |
|---|---|---|
| committer | Chris Ball <chris@printf.net> | 2014-01-13 12:48:08 -0500 |
| commit | 8b2bb0adce2c0cb63fcb77f4e54ac11ae54d84c0 (patch) | |
| tree | 97a64d4ef884a62ce8603937e54fe399ce3649bb /drivers/mmc/host | |
| parent | d131a71c951088704eabe1529de99188c9e2c22c (diff) | |
| download | linux-8b2bb0adce2c0cb63fcb77f4e54ac11ae54d84c0.tar.gz linux-8b2bb0adce2c0cb63fcb77f4e54ac11ae54d84c0.tar.bz2 linux-8b2bb0adce2c0cb63fcb77f4e54ac11ae54d84c0.zip | |
mmc: esdhc-imx: clearing SDHCI_CTRL_EXEC_TUNING should not affect other bits
Current code will clear all turning related bits like ESDHC_STD_TUNING_EN
and ESDHC_MIX_CTRL_FBCLK_SEL when clear SDHCI_CTRL_EXEC_TUNING.
This may cause the card which has already passed the turning to become
unwork since the turning status lost.
We observed this failure when enable runtime pm.
BTW, imx needs to enable ESDHC_MIX_CTRL_FBCLK_SEL bit for turned clock.
The FBCLK_SEL will be cleared when SDHCI_CTRL_TUNED_CLK is cleared
and SDHCI_CTRL_EXEC_TUNING is not set.
This is used in case we change to another normal card from a UHS card
in the same slot. FBCLK_SEL is not needed for normal card.
After that, SDHCI_CTRL_EXEC_TUNING will only affect ESDHC_MIX_CTRL_EXE_TUNE.
Clearing it does not affect the turned card to remain working on UHS mode.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/host')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index d85a6a6f9e29..b1544a786eb6 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -439,24 +439,20 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) } else if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) { u32 v = readl(host->ioaddr + SDHCI_ACMD12_ERR); u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL); - new_val = readl(host->ioaddr + ESDHC_TUNING_CTRL); + if (val & SDHCI_CTRL_TUNED_CLK) { + v |= ESDHC_MIX_CTRL_SMPCLK_SEL; + } else { + v &= ~ESDHC_MIX_CTRL_SMPCLK_SEL; + m &= ~ESDHC_MIX_CTRL_FBCLK_SEL; + } + if (val & SDHCI_CTRL_EXEC_TUNING) { - new_val |= ESDHC_STD_TUNING_EN | - ESDHC_TUNING_START_TAP; v |= ESDHC_MIX_CTRL_EXE_TUNE; m |= ESDHC_MIX_CTRL_FBCLK_SEL; } else { - new_val &= ~ESDHC_STD_TUNING_EN; v &= ~ESDHC_MIX_CTRL_EXE_TUNE; - m &= ~ESDHC_MIX_CTRL_FBCLK_SEL; } - if (val & SDHCI_CTRL_TUNED_CLK) - v |= ESDHC_MIX_CTRL_SMPCLK_SEL; - else - v &= ~ESDHC_MIX_CTRL_SMPCLK_SEL; - - writel(new_val, host->ioaddr + ESDHC_TUNING_CTRL); writel(v, host->ioaddr + SDHCI_ACMD12_ERR); writel(m, host->ioaddr + ESDHC_MIX_CTRL); } @@ -1038,6 +1034,12 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) sdhci_esdhc_ops.platform_execute_tuning = esdhc_executing_tuning; + + if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) + writel(readl(host->ioaddr + ESDHC_TUNING_CTRL) | + ESDHC_STD_TUNING_EN | ESDHC_TUNING_START_TAP, + host->ioaddr + ESDHC_TUNING_CTRL); + boarddata = &imx_data->boarddata; if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) { if (!host->mmc->parent->platform_data) { |