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author | Raul E Rangel <rrangel@chromium.org> | 2019-06-17 14:10:13 -0600 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2019-06-18 13:39:03 +0200 |
commit | de23f0b757766d9fae59df97da6e8bdc5b231351 (patch) | |
tree | 3a255290b5c8dadca18b283d40e659806bcc7536 /drivers/mmc | |
parent | 99a934443d9282b92f721e5d0c6ec5bdee10fbcb (diff) | |
download | linux-de23f0b757766d9fae59df97da6e8bdc5b231351.tar.gz linux-de23f0b757766d9fae59df97da6e8bdc5b231351.tar.bz2 linux-de23f0b757766d9fae59df97da6e8bdc5b231351.zip |
mmc: sdhci: sdhci-pci-o2micro: Check if controller supports 8-bit width
The O2 controller supports 8-bit EMMC access.
JESD84-B51 section A.6.3.a defines the bus testing procedure that
`mmc_select_bus_width()` implements. This is used to determine the actual
bus width of the eMMC.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/sdhci-pci-o2micro.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index dd21315922c8..9dc4548271b4 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -395,11 +395,21 @@ int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) { struct sdhci_pci_chip *chip; struct sdhci_host *host; - u32 reg; + u32 reg, caps; int ret; chip = slot->chip; host = slot->host; + + caps = sdhci_readl(host, SDHCI_CAPABILITIES); + + /* + * mmc_select_bus_width() will test the bus to determine the actual bus + * width. + */ + if (caps & SDHCI_CAN_DO_8BIT) + host->mmc->caps |= MMC_CAP_8_BIT_DATA; + switch (chip->pdev->device) { case PCI_DEVICE_ID_O2_SDS0: case PCI_DEVICE_ID_O2_SEABIRD0: |