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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2010-03-05 13:43:43 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-06 11:26:43 -0800 |
commit | 541e7ef0399c6c5753cc8d3e8f371dcb3627e8a4 (patch) | |
tree | aa59b87e5a72be2dffce79e85c4df2ccb58e12d7 /drivers/mmc | |
parent | 9af13be2acac60ca5593e41a601d4a5b6bc35302 (diff) | |
download | linux-541e7ef0399c6c5753cc8d3e8f371dcb3627e8a4.tar.gz linux-541e7ef0399c6c5753cc8d3e8f371dcb3627e8a4.tar.bz2 linux-541e7ef0399c6c5753cc8d3e8f371dcb3627e8a4.zip |
mmc: at91_mci: Enable MMC_CAP_SDIO_IRQ only when it actually works.
According to the datasheets AT91SAM9261 does not support SDIO interrupts,
and AT91SAM9260/9263 have an erratum requiring 4bit mode while using slot
B for the interrupt to work.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Wolfgang Muees <wolfgang.mues@auerswald.de>
Cc: Andrew Victor <avictor.za@gmail.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/at91_mci.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c index 3cd00c6f2584..8327daebb396 100644 --- a/drivers/mmc/host/at91_mci.c +++ b/drivers/mmc/host/at91_mci.c @@ -929,7 +929,7 @@ static int __init at91_mci_probe(struct platform_device *pdev) mmc->f_min = 375000; mmc->f_max = 25000000; mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; - mmc->caps = MMC_CAP_SDIO_IRQ; + mmc->caps = 0; mmc->max_blk_size = MCI_MAXBLKSIZE; mmc->max_blk_count = MCI_BLKATONCE; @@ -958,6 +958,13 @@ static int __init at91_mci_probe(struct platform_device *pdev) goto fail5; } + /* Add SDIO capability when available */ + if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) { + /* AT91SAM9260/9263 erratum */ + if (host->board->wire4 || !host->board->slot_b) + mmc->caps |= MMC_CAP_SDIO_IRQ; + } + /* * Reserve GPIOs ... board init code makes sure these pins are set * up as GPIOs with the right direction (input, except for vcc) |