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authorMarek Vasut <marex@denx.de>2016-08-02 15:10:47 +0200
committerCyrille Pitchen <cyrille.pitchen@atmel.com>2017-01-04 09:54:03 +0100
commit0cf1725676a97fc8b4dd88794ea0acc1325b4fb7 (patch)
tree3dd154fd9a2b6e0ad2ea9b4b063c25ff32658def /drivers/mtd
parent7ce7d89f48834cefece7804d38fc5d85382edf77 (diff)
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mtd: spi-nor: cqspi: Fix build on arches missing readsl/writesl
The x86-64 and some other architectures are missing readsl/writesl functions, so this driver won't build on them. Use a more portable ioread32_rep()/iowrite32_rep() instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alan Tull <atull@opensource.altera.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Graham Moore <grmoore@opensource.altera.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Yves Vandervennet <yvanderv@opensource.altera.com> Suggested-by: Stefan Roese <sr@denx.de> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/Kconfig2
-rw-r--r--drivers/mtd/spi-nor/cadence-quadspi.c6
2 files changed, 5 insertions, 3 deletions
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 4a682ee0f632..1e6f037923d9 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -40,7 +40,7 @@ config SPI_ATMEL_QUADSPI
config SPI_CADENCE_QUADSPI
tristate "Cadence Quad SPI controller"
- depends on OF && ARM
+ depends on OF && (ARM || COMPILE_TEST)
help
Enable support for the Cadence Quad SPI Flash controller.
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index d489fbd07c12..3fb7be857bb6 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -526,7 +526,8 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor,
bytes_to_read *= cqspi->fifo_width;
bytes_to_read = bytes_to_read > remaining ?
remaining : bytes_to_read;
- readsl(ahb_base, rxbuf, DIV_ROUND_UP(bytes_to_read, 4));
+ ioread32_rep(ahb_base, rxbuf,
+ DIV_ROUND_UP(bytes_to_read, 4));
rxbuf += bytes_to_read;
remaining -= bytes_to_read;
bytes_to_read = cqspi_get_rd_sram_level(cqspi);
@@ -610,7 +611,8 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor,
while (remaining > 0) {
write_bytes = remaining > page_size ? page_size : remaining;
- writesl(cqspi->ahb_base, txbuf, DIV_ROUND_UP(write_bytes, 4));
+ iowrite32_rep(cqspi->ahb_base, txbuf,
+ DIV_ROUND_UP(write_bytes, 4));
ret = wait_for_completion_timeout(&cqspi->transfer_complete,
msecs_to_jiffies