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| author | Roman Tereshonkov <roman.tereshonkov@nokia.com> | 2010-11-03 12:55:21 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-12-03 16:28:41 +0000 |
| commit | ac80dac00f8630803dc0c7f8fbe6983a8e2a8b5f (patch) | |
| tree | b4504a58422ec740ba7943ae4a5573f8cfd3a2ba /drivers/mtd | |
| parent | d19d7b46d2b4936be14cfeef779ffeb76cf7b757 (diff) | |
| download | linux-ac80dac00f8630803dc0c7f8fbe6983a8e2a8b5f.tar.gz linux-ac80dac00f8630803dc0c7f8fbe6983a8e2a8b5f.tar.bz2 linux-ac80dac00f8630803dc0c7f8fbe6983a8e2a8b5f.zip | |
mtd: onenand: implement cache program feature for 4KiB page onenand
Implement cache program feature for 4KiB page onenand.
This feature improves the write data performance.
The observed 128KiB data program speed change is
from 8827KiB/s to 14156 KiB/s when the feature is enabled.
Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/onenand/onenand_base.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 6b3a875647c9..4d6e6c54cc2c 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -1845,7 +1845,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, const u_char *buf = ops->datbuf; const u_char *oob = ops->oobbuf; u_char *oobbuf; - int ret = 0; + int ret = 0, cmd; DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", __func__, (unsigned int) to, (int) len); @@ -1954,7 +1954,19 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, ONENAND_SET_NEXT_BUFFERRAM(this); } - this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); + this->ongoing = 0; + cmd = ONENAND_CMD_PROG; + + /* Exclude 1st OTP and OTP blocks for cache program feature */ + if (ONENAND_IS_CACHE_PROGRAM(this) && + likely(onenand_block(this, to) != 0) && + ONENAND_IS_4KB_PAGE(this) && + ((written + thislen) < len)) { + cmd = ONENAND_CMD_2X_CACHE_PROG; + this->ongoing = 1; + } + + this->command(mtd, cmd, to, mtd->writesize); /* * 2 PLANE, MLC, and Flex-OneNAND wait here @@ -3377,8 +3389,10 @@ static void onenand_check_features(struct mtd_info *mtd) case ONENAND_DEVICE_DENSITY_4Gb: if (ONENAND_IS_DDP(this)) this->options |= ONENAND_HAS_2PLANE; - else if (numbufs == 1) + else if (numbufs == 1) { this->options |= ONENAND_HAS_4KB_PAGE; + this->options |= ONENAND_HAS_CACHE_PROGRAM; + } case ONENAND_DEVICE_DENSITY_2Gb: /* 2Gb DDP does not have 2 plane */ @@ -3415,6 +3429,8 @@ static void onenand_check_features(struct mtd_info *mtd) printk(KERN_DEBUG "Chip has 2 plane\n"); if (this->options & ONENAND_HAS_4KB_PAGE) printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); + if (this->options & ONENAND_HAS_CACHE_PROGRAM) + printk(KERN_DEBUG "Chip has cache program feature\n"); } /** |