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author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2009-09-10 14:33:30 +0800 |
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committer | Eric Miao <eric.y.miao@gmail.com> | 2009-12-01 09:02:41 +0800 |
commit | d3490dfdbc453a16bc7f3cff731c9f7851735ab3 (patch) | |
tree | 8384cef1ea03d64a9a280d0ae8b1beecf994fb68 /drivers/mtd | |
parent | 346e125967c39fc25263f3071dfc88224ae843f4 (diff) | |
download | linux-d3490dfdbc453a16bc7f3cff731c9f7851735ab3.tar.gz linux-d3490dfdbc453a16bc7f3cff731c9f7851735ab3.tar.bz2 linux-d3490dfdbc453a16bc7f3cff731c9f7851735ab3.zip |
pxa3xx_nand: add new nand chip support
Support samsung 2GbX8 and 32GbX8 nand flash.
Support micron 4GbX8 and 4GbX16 nand flash.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 11f32454fc77..7f97d57e8a5e 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -226,6 +226,28 @@ static struct pxa3xx_nand_flash samsung512MbX16 = { .chip_id = 0x46ec, }; +static struct pxa3xx_nand_flash samsung2GbX8 = { + .timing = &samsung512MbX16_timing, + .cmdset = &smallpage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 2048, + .chip_id = 0xdaec, +}; + +static struct pxa3xx_nand_flash samsung32GbX8 = { + .timing = &samsung512MbX16_timing, + .cmdset = &smallpage_cmdset, + .page_per_block = 128, + .page_size = 4096, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 8192, + .chip_id = 0xd7ec, +}; + static struct pxa3xx_nand_timing micron_timing = { .tCH = 10, .tCS = 25, @@ -260,6 +282,28 @@ static struct pxa3xx_nand_flash micron1GbX16 = { .chip_id = 0xb12c, }; +static struct pxa3xx_nand_flash micron4GbX8 = { + .timing = µn_timing, + .cmdset = &largepage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 4096, + .chip_id = 0xdc2c, +}; + +static struct pxa3xx_nand_flash micron4GbX16 = { + .timing = µn_timing, + .cmdset = &largepage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 16, + .dfc_width = 16, + .num_blocks = 4096, + .chip_id = 0xcc2c, +}; + static struct pxa3xx_nand_timing stm2GbX16_timing = { .tCH = 10, .tCS = 35, @@ -285,8 +329,12 @@ static struct pxa3xx_nand_flash stm2GbX16 = { static struct pxa3xx_nand_flash *builtin_flash_types[] = { &samsung512MbX16, + &samsung2GbX8, + &samsung32GbX8, µn1GbX8, µn1GbX16, + µn4GbX8, + µn4GbX16, &stm2GbX16, }; #endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */ |