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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2019-05-12 20:33:26 -0700 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-06-07 07:10:39 +0300 |
| commit | 21ed90acd1786880129eeae9d6718b5fc8663c36 (patch) | |
| tree | 4d9efd6e98078b7b1355ddb219f413390edb030a /drivers/mtd | |
| parent | df6bd6c002a4dee73d274a87ef1c0e36f21d2583 (diff) | |
| download | linux-21ed90acd1786880129eeae9d6718b5fc8663c36.tar.gz linux-21ed90acd1786880129eeae9d6718b5fc8663c36.tar.bz2 linux-21ed90acd1786880129eeae9d6718b5fc8663c36.zip | |
mtd: spi-nor: Add Micron MT25QL02 support
Add an entry for Micron MT25QL02 which is a 3V variant of already
supported MT25QU02.
Testing was done on a ZII VF610 Dev Board (rev. B).
Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
[tudor.ambarus@microchip.com: order entry alphabetically, wrap to
80 chars limit]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 73172d7f512b..c8a965859d7b 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1880,6 +1880,9 @@ static const struct flash_info spi_nor_ids[] = { { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096, + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + NO_CHIP_ERASE) }, { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, /* Micron */ |