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| author | Florian Fainelli <ffainelli@freebox.fr> | 2010-04-09 01:04:52 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-04-13 03:29:36 -0700 |
| commit | 5e10d4a7fc80e4ef310c07a6a547406fef50534a (patch) | |
| tree | 7403140f22fbdbb454d990f1d1a4b504aa235bc0 /drivers/net/bcm63xx_enet.c | |
| parent | 0de8655ab9181cbaca82aa60402b14118e06d030 (diff) | |
| download | linux-5e10d4a7fc80e4ef310c07a6a547406fef50534a.tar.gz linux-5e10d4a7fc80e4ef310c07a6a547406fef50534a.tar.bz2 linux-5e10d4a7fc80e4ef310c07a6a547406fef50534a.zip | |
bcm63xx_enet: do not overwrite ENET_CTL_REG value
bcm_enet_hw_preinit will correctly set values in ENET_CTL_REG for internal
or external MII operations, however, bcm_enet_open will blindly overwrite the
ENET_CTL_REG register value and thus we will loose any changes to it that
were made in bcm_enet_hw_preinit, rendering external MII operations non-working.
This would lead to the driver not being able to check for link availability on
external PHY setups, and thus we would never get to sending packets because
link was down from the driver side.
This was completely un-noticed because all boards out there but BCM6338-based
ones use internal phy on their enet0 interface.
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bcm63xx_enet.c')
| -rw-r--r-- | drivers/net/bcm63xx_enet.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/bcm63xx_enet.c b/drivers/net/bcm63xx_enet.c index d91105693c8a..37a4be57a2b7 100644 --- a/drivers/net/bcm63xx_enet.c +++ b/drivers/net/bcm63xx_enet.c @@ -959,7 +959,9 @@ static int bcm_enet_open(struct net_device *dev) /* all set, enable mac and interrupts, start dma engine and * kick rx dma channel */ wmb(); - enet_writel(priv, ENET_CTL_ENABLE_MASK, ENET_CTL_REG); + val = enet_readl(priv, ENET_CTL_REG); + val |= ENET_CTL_ENABLE_MASK; + enet_writel(priv, val, ENET_CTL_REG); enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, ENETDMA_CHANCFG_REG(priv->rx_chan)); |