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| author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-03-13 14:04:35 -0700 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-03-13 15:40:41 -0700 |
| commit | 887012e80aeaf36968456e8085abf41aee907707 (patch) | |
| tree | 1a5e687e85a2d15ca5330de8d3613270f7f37ef9 /drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c | |
| parent | bc035fc55ecbe50fd087270e8312a090b5eccb3a (diff) | |
| download | linux-887012e80aeaf36968456e8085abf41aee907707.tar.gz linux-887012e80aeaf36968456e8085abf41aee907707.tar.bz2 linux-887012e80aeaf36968456e8085abf41aee907707.zip | |
ixgbe: enable relaxed ordering for SPARC
This patch makes sure that relaxed ordering is not disabled when
on SPARC, where it helps with performance.
CC: <kernel-team@fb.com>
CC: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Reported-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c index 51628b30cb1c..824a7ab79ab6 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c @@ -171,17 +171,21 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw) * @hw: pointer to hardware structure * * Starts the hardware using the generic start_hw function. - * Disables relaxed ordering Then set pcie completion timeout + * Disables relaxed ordering for archs other than SPARC + * Then set pcie completion timeout * **/ static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw) { +#ifndef CONFIG_SPARC u32 regval; u32 i; +#endif s32 ret_val; ret_val = ixgbe_start_hw_generic(hw); +#ifndef CONFIG_SPARC /* Disable relaxed ordering */ for (i = 0; ((i < hw->mac.max_tx_queues) && (i < IXGBE_DCA_MAX_QUEUES_82598)); i++) { @@ -197,7 +201,7 @@ static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw) IXGBE_DCA_RXCTRL_HEAD_WRO_EN); IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); } - +#endif if (ret_val) return ret_val; |